Semiconductor Pillar Charge Control for NAND Write Reliability
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Solution Overview
Problem
The reliability of write operations in three-dimensional NAND flash memory devices is compromised due to trapped carriers in semiconductor pillars, leading to potential erroneous writing and self-boosting issues.
Innovation Solution
The memory device employs a verify operation followed by a discharge of carriers trapped in the semiconductor pillar, ensuring a stable electrical state and preventing erroneous writing by pre-charging the semiconductor pillar through the source line and well region during the verify read and subsequent discharge through the bit line or source line, maintaining electrical stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If carriers are trapped in semiconductor pillars during write operations, then memory cell data storage is enabled, but erroneous writing and self-boosting issues occur reducing reliability
Solution Approach 1:
The patent applies preliminary action by performing a verify read operation and discharging trapped carriers from the semiconductor pillar before executing the write operation. This preliminary discharge prevents the trapped carriers from causing erroneous writing or self-boosting during the subsequent write operation, thereby improving write reliability while eliminating the harmful trapped carrier effect.
2Reliability
If a verify operation is performed before write operation, then erroneous writing is prevented, but operation time increases
Solution Approach 1:
The patent implements periodic action by integrating the verify read operation as a periodic step within the write operation sequence. The verify read is performed at specific intervals (before write operations on previously read blocks), creating a rhythmic pattern of verification that balances reliability improvement with time management, avoiding continuous verification that would excessively increase operation time.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the reliability of write operations by effectively discharging carriers from the semiconductor pillar, reducing the risk of erroneous writing and maintaining a stable electrical state within the memory device.
Implementation Method 1
the semiconductor pillar is charged after performing a read operation on the memory cell
Implementation Method 2
discharge of carriers trapped in the semiconductor pillar
Data Source
AI summary
A memory device includes a word line above a semiconductor substrate, a semiconductor pillar extending through the word line in a direction crossing a surface of the semiconductor substrate, a memory cell at an intersection of the word line and the semiconductor pillar and having a gate electrically connected to the word line, a bit line electrically connected to a first end of the memory cell, a source line electrically connected to a second end of the memory cell, and a controller that controls a write operation on the memory cell, the write operation including a program operation followed by a verify operation. During the verify operation on the memory cell, the semiconductor pillar is charged after performing a read operation on the memory cell.