Semiconductor Pillar Structure Layout for Scaled MOSFET Reliability
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Solution Overview
Problem
The scale-down of metal-oxide-semiconductor field-effect transistors (MOS-FETs) in semiconductor devices leads to deterioration in operation characteristics, necessitating improved electrical and reliability characteristics.
Innovation Solution
A semiconductor device design featuring a substrate with first and second active patterns, first and second channel structures, first and second pillar structures, and gate spacers, which include specific surface configurations and material contacts to enhance electrical and reliability performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If MOS-FETs are scaled down to meet small pattern size demand, then device density is improved, but operation characteristics deteriorate
Solution Approach 1:
The patent introduces pillar structures that extend in the vertical dimension (third direction perpendicular to substrate) to address horizontal scaling limitations. The first pillar structure extends from the substrate upward, and the second pillar structure extends from the first pillar structure, creating a multi-level three-dimensional architecture that enables continued device density improvement without further horizontal scaling, thereby maintaining operation characteristics while reducing pattern size.
2Reliability
If pillar structures are added to improve electrical characteristics, then device performance is improved, but structural complexity increases
Solution Approach 1:
The patent divides the pillar structure into multiple segments: a first pillar structure extending from the substrate and a second pillar structure extending from the first pillar structure. This segmentation allows each pillar to serve specific functions - the first pillar provides structural support and electrical isolation, while the second pillar enhances electrical characteristics - thereby improving overall device performance while managing structural complexity through functional decomposition.
Solution Approach 2:
The first pillar structure acts as an intermediary element between the substrate and the second pillar structure, and between active patterns. It provides a platform for the second pillar structure and enables electrical isolation and signal transmission functions, thereby improving electrical characteristics while organizing the complex structure into manageable functional layers.
Data Source
AI summary
A semiconductor device may include a substrate that comprises a first active pattern and a second active pattern that are spaced apart from each other; a first channel structure on the first active pattern; a first source/drain pattern on the first channel structure; a first pillar structure between the first active pattern and the second active pattern; and a second pillar structure on the first pillar structure, wherein the first pillar structure comprises a first upper surface that is in contact with the second pillar structure and a second upper surface that is higher than the first upper surface, wherein the first upper surface of the first pillar structure is lower than an uppermost surface of the first channel structure, wherein the second upper surface of the first pillar structure is lower than an upper surface of the second pillar structure.