Semiconductor Pillar Structure With Isolation Layer for Bit Line Leakage
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Solution Overview
Problem
Conventional vertical gate-all-around (VGAA) transistors face electric leakage issues between the bit line and the substrate due to direct manufacturing of the bit line on the substrate surface.
Innovation Solution
The semiconductor structure involves a base with semiconductor pillars formed by intersecting trenches, an isolation layer below the trenches, and a bit line located on the isolation layer, connected to the bottom of the semiconductor pillar, thereby reducing electric leakage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the bit line is directly manufactured on the substrate surface, then the manufacturing process is simple, but electric leakage occurs between the bit line and the substrate
Solution Approach 1:
An isolation layer is introduced as an intermediary component between the substrate and the bit line. This isolation layer prevents direct contact between the bit line and substrate, thereby blocking electric leakage while maintaining the manufacturing simplicity of direct bit line formation on the substrate surface.
Solution Approach 2:
The structure is segmented into distinct functional layers: the substrate, the isolation layer, and the bit line. This segmentation allows the isolation layer to specifically address the electric leakage issue without requiring changes to the bit line formation process itself, thus maintaining manufacturing simplicity while improving reliability.
2Reliability
If an isolation layer is introduced between the bit line and substrate, then electric leakage is reduced, but the device structure becomes more complex
Solution Approach 1:
The isolation layer serves multiple functions: it prevents electric leakage between the bit line and substrate, provides mechanical support, and facilitates subsequent processing steps. By consolidating these functions into a single layer, the structure achieves improved reliability without proportionally increasing complexity.
Solution Approach 2:
The isolation layer is formed in advance before bit line formation, preparing the substrate surface for subsequent processing. This preliminary action simplifies the overall manufacturing sequence by establishing the isolation structure early, reducing the need for additional complex steps later in the process.
Data Source
AI summary
The present disclosure relates to a semiconductor structure and a manufacturing method thereof. The semiconductor structure includes: a base, including a semiconductor substrate, the semiconductor substrate is provided with first trenches extending along a first direction and second trenches extending along a second direction, the first trenches intersect with the second trenches to form a plurality of semiconductor pillars on the semiconductor substrate, the second trench is filled with a first dielectric layer, a second dielectric layer is provided on a top of the semiconductor pillar, and a third dielectric layer is provided on a sidewall of the first trench; an isolation layer, located in the semiconductor substrate below the first trenches and extending along the second direction; and a bit line, located on a surface of the isolation layer and extending along the second direction, the bit line is connected to a bottom of the semiconductor pillar.