Semiconductor Device Manufacturing Planarization

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Solution Overview

Problem

In semiconductor device manufacturing, the nanoimprint method faces challenges with pattern defects due to insufficient resist supply when there is a significant surface step between planes on the substrate, leading to incomplete filling of patterns and defects in the resist layer.

Innovation Solution

The method involves forming a first layer with a surface step of 30 nm or more, followed by planarization to reduce this step to less than 30 nm using chemical mechanical polishing, allowing for the direct formation of a second layer and subsequent resist application, which is then pattern-transferred using a template, and etching the second layer as a mask to prevent resist insufficiency and defects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If a template is brought into contact with resist supplied to a surface with a large surface step, then pattern transfer is attempted, but insufficient resist fills the pattern and defects occur

Engineering Contradiction:
Improvepattern fidelityVSAvoidresist amount
Core Design Contradiction:
Manufacturing precisionVSQuantity of substance

Solution Approach 1:

The patent performs planarization processing on the first layer before forming the second layer and applying resist. This preliminary action removes surface steps and creates a flat surface, ensuring that subsequent resist application results in uniform resist thickness and adequate resist filling in the template pattern, thereby preventing pattern defects.

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If planarization processing is performed to reduce surface step, then resist coverage becomes uniform, but additional processing steps are required

Engineering Contradiction:
Improveresist coverage uniformityVSAvoidprocess steps
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The planarization processing is performed as a preliminary step before resist application and pattern formation. By flattening the surface in advance, the patent ensures uniform resist coverage and adequate resist filling without requiring complex resist application techniques or multiple coating steps, thus achieving improved uniformity with a manageable process complexity.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively suppresses pattern defects by ensuring adequate resist coverage and uniformity, enhancing the reliability of the nanoimprint process and improving pattern fidelity on semiconductor substrates.

Implementation Method 1

performing planarization processing on the first layer to have the difference of less than 30 nm

Methodology Applied
Scientific EffectChemical mechanical polishing:

Data Source

PatentUS10985027B2Method for manufacturing semiconductor device
Publication Date: 2021.04.20 KIOXIA CORP
  • US10985027B2 patent drawing
  • US10985027B2 patent drawing
  • US10985027B2 patent drawing

AI summary

A method for manufacturing a semiconductor device according to an embodiment includes: forming a first layer on a semiconductor substrate, a surface of the first layer having a first plane of which distance from the semiconductor substrate is a first distance and a second plane of which distance from the semiconductor substrate is a second distance smaller than the first distance, and a difference between the first distance and the second distance being 30 nm or more; performing planarization processing on the first layer to have the difference of less than 30 nm; forming a second layer directly on the first layer after performing the planarization processing; supplying a resist to the second layer; bringing a template having a pattern into contact with the resist to form a resist layer to which the pattern has been transferred; and etching the second layer using the resist layer as a mask.