Embedded Semiconductor Platform for Wafer-Level Packaging
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Solution Overview
Problem
Warping during encapsulation in electronic device packaging reduces manufacturing yields and increases costs, and the use of copper embedded ground planes leads to high tooling and material costs, as well as saw blade wear.
Innovation Solution
Incorporating an embedded platform structure made of semiconductor material, such as a silicon wafer, to limit warpage and reduce thermal expansion, which also serves as a platform for additional electronic circuits and through-silicon vias.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If an embedded ground plane is built into a panel assembly to limit warpage, then warpage control is improved, but manufacturing costs and saw blade wear increase due to copper material hardness
Solution Approach 1:
The patent changes the material parameter of the embedded platform structure from copper to semiconductor material (such as silicon). This material substitution maintains the warpage control function while improving ease of manufacture by reducing saw blade wear and manufacturing costs, as semiconductor materials are softer and less expensive than copper.
Solution Approach 2:
The patent uses a composite structure where semiconductor material serves as the embedded platform structure within the panel assembly. This composite approach combines the structural stability needed for warpage control with the manufacturing advantages of semiconductor materials, resolving the contradiction between stability and ease of manufacture.
2Adaptability or versatility
If copper is used for embedded ground plane to provide ground routing, then electrical functionality is achieved, but thermal expansion increases leading to die drift
Solution Approach 1:
The patent changes the material parameter from copper to semiconductor material, which has different thermal expansion characteristics. Semiconductor materials generally exhibit lower thermal expansion coefficients, thereby reducing thermal expansion-related die drift while maintaining the ground routing functionality through the embedded platform structure.
3Adaptability or versatility
If redistribution process is used to connect contact pads to exposed pads, then electrical connectivity is achieved, but manufacturing complexity increases due to multiple conductive layers
Solution Approach 1:
The embedded semiconductor platform structure serves multiple functions: it provides mechanical support for warpage control, acts as an embedded ground plane for electrical connectivity, and serves as a substrate for additional electronic circuits and through-silicon vias. This multi-functionality reduces manufacturing complexity by consolidating multiple functions into a single structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach increases package yield, decreases manufacturing complexity and costs, and reduces saw blade wear, while providing better die drift performance compared to copper embedded ground planes.
Implementation Method 1
the embedded platform structure serves to limit warpage of the panel assembly during encapsulation... the implementation of an embedded platform structure, such as a semiconductor wafer, in the panel assembly can achieve reduced thermal expansion
Implementation Method 2
Encapsulation material fills the cavities and couples the electronic devices to the platform structure
Data Source
AI summary
A wafer level packaging method entails providing electronic devices and providing a platform structure having cavities extending through the platform structure. The platform structure is mounted to a temporary support. One or more electronic devices are placed in the cavities with an active side of each electronic device facing the temporary support. The platform structure and the electronic devices are encapsulated in an encapsulation material to produce a panel assembly. Redistribution layers may be formed over the panel assembly, after which the panel assembly may be separated into a plurality of integrated electronic packages. The platform structure may be formed from a semiconductor material, and platform segments within each package provide a fan-out region for conductive interconnects, as well as provide a platform for a metallization layer and/or for forming through silicon vias.