Semiconductor Device Plating Thickness for Thermal Stress

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Solution Overview

Problem

Conventional semiconductor devices with plating thicknesses of 3 to 5 μm are prone to thermal stress-induced deformation, leading to characteristic variations and potential destruction of semiconductor elements due to the mismatch in linear expansion coefficients between aluminum patterns and insulating substrates, which affects the reliability and power cycle life.

Innovation Solution

Increasing the plating thickness to 10 μm or more on aluminum patterns, combined with nickel plating and potential work hardening, suppresses deformation and enhances reliability by reducing the transmission of thermal stress to semiconductor elements, while maintaining adhesion and hardness properties.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Temperature

If plating thickness is reduced to 3-5 μm, then thermal resistance is improved, but semiconductor element deformation and reliability deteriorate due to thermal stress transmission

Engineering Contradiction:
Improvethermal resistanceVSAvoidsemiconductor element reliability
Core Design Contradiction:
TemperatureVSReliability

Solution Approach 1:

The invention changes the critical parameter of plating thickness from the conventional 3-5 μm range to 10 μm or more. This parameter change creates a threshold effect where the plating layer becomes thick enough to act as an effective stress buffer, preventing thermal stress from the aluminum pattern from being transmitted to the semiconductor element, while still maintaining acceptable thermal resistance characteristics

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The invention applies the cushioning principle by using a sufficiently thick plating layer (10 μm or more) as a protective buffer between the aluminum pattern and the semiconductor element. This plating layer absorbs and dissipates thermal stress before it can reach the semiconductor element, preventing deformation and reliability issues while allowing heat to conduct through the structure

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

2Reliability

If plating thickness is increased to 10 μm or more, then semiconductor element deformation is prevented, but thermal resistance increases

Engineering Contradiction:
Improvesemiconductor element reliabilityVSAvoidthermal resistance
Core Design Contradiction:
ReliabilityVSTemperature

Solution Approach 1:

The invention establishes a new parameter threshold (10 μm or more) that optimizes the balance between mechanical protection and thermal performance. At this thickness, the plating layer provides sufficient stress buffering to prevent semiconductor element deformation while maintaining adequate heat conduction pathways through the aluminum pattern and plating structure

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The increased plating thickness effectively prevents semiconductor element deformation, improves reliability, and extends power cycle life by reducing the impact of thermal stress, thereby enhancing the overall performance and durability of semiconductor devices.

Implementation Method 1

thermal stress is generated since there is a large difference in a coefficient of linear expansion between the aluminum pattern and the insulating substrate

Methodology Applied
Scientific EffectThermal stress: Thermal Expansion

Data Source

PatentUS10658324B2Semiconductor device
Publication Date: 2020.05.19 MITSUBISHI ELECTRIC CORP
  • US10658324B2 patent drawing
  • US10658324B2 patent drawing
  • US10658324B2 patent drawing

AI summary

A semiconductor device includes: an insulating substrate; an aluminum pattern made of a pure aluminum or alloy aluminum material and formed on the insulating substrate; a plating formed on a surface of the aluminum pattern; and a semiconductor element joined to the plating, wherein a thickness of the plating is 10 μm or more.