Semiconductor Device Corrosion Protection via Segmented Plating Wiring
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Solution Overview
Problem
Semiconductor packages face corrosion issues due to exposed plating wiring, which can lead to defects in internal wiring layers when used in environments with high temperature and humidity.
Innovation Solution
A semiconductor device design that includes a resin substrate with a recess portion between the plating wiring and the internal wiring layer, filled with mold resin to electrically separate and protect the internal wiring from corrosion, and an underfill resin on the second surface to further prevent corrosion progression.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the plating wiring is provided in common for multiple wiring boards before individualization, then the plating treatment efficiency is improved, but the exposed plating wiring on the dicing line causes corrosion that can progress to internal wiring layers
Solution Approach 1:
The patent segments the wiring structure by providing separate plating wirings for different wiring boards instead of using a common plating wiring. This segmentation prevents corrosion from propagating between adjacent wiring boards, as each board has its own isolated plating wiring that cannot serve as a corrosion pathway to internal wiring layers of neighboring boards.
Solution Approach 2:
The patent extracts or removes the problematic exposed plating wiring from the final product structure. By eliminating the need for exposed plating wirings on the outer surface through individualized wiring board design, the corrosion pathway is removed, thereby protecting internal wiring layers while maintaining plating treatment efficiency during manufacturing.
2Ease of manufacture
If the plating wiring is removed on the dicing line after individualization, then the wiring board is individualized successfully, but a part of the plating wiring remains exposed from the outer surface and causes corrosion
Solution Approach 1:
The patent applies segmentation by designing individualized plating wirings for each wiring board that are completely contained within the board boundaries. This eliminates the need for dicing line removal and prevents exposed plating wirings, as each board's plating wiring is self-contained and does not extend to the outer surface requiring removal.
Solution Approach 2:
The patent extracts the problematic exposed plating wiring portion by redesigning the plating wiring configuration to be fully internal to each wiring board. This extraction eliminates the corrosion hazard while preserving the ease of manufacturing through individualized board design that doesn't require post-dicing plating wiring removal.
3Manufacturing precision
If electrolytic plating method is used on the bonding pad surface, then the plating quality is improved, but the plating wiring must be electrically connected to the bonding pad which creates corrosion pathways
Solution Approach 1:
The patent segments the electrical connection structure by providing dedicated plating wirings for each bonding pad rather than using shared plating wiring pathways. This segmentation maintains the electrical connection necessary for electrolytic plating quality while isolating corrosion pathways, as each plating wiring is confined to its specific bonding pad area and cannot propagate corrosion to internal wiring layers.
Solution Approach 2:
The patent extracts the corrosion pathway by removing the direct electrical connection between plating wirings and internal wiring layers. The plating wirings are designed to connect only to bonding pads on the outer surface, and through individualized board design, the connection path to internal wiring layers is eliminated, thereby protecting internal wiring while preserving plating quality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Effectively prevents corrosion from progressing to the internal wiring layers, ensuring the reliability and longevity of the semiconductor device even in harsh environments.
Implementation Method 1
a recess portion provided between the plating wiring and the internal wiring layer; wherein the recess portion is filled with mold resin
Implementation Method 2
When the surface of the bonding pad is plated using an electrolytic plating method
Data Source
AI summary
A semiconductor device includes a substrate having a first surface, a second surface opposite to the first surface, and a side surface extending between the first surface and the second surface; a pad electrode provided on the first surface of the substrate; an internal wiring provided in the substrate, and electrically connected to the pad electrode; a first wiring provided in the substrate, and exposed from the substrate at the side surface; an insulator provided between the first wiring and the internal wiring so as to separate the first wiring from the internal wiring; a semiconductor chip provided on the substrate, and electrically connected to the pad electrode; and a resin covering the semiconductor chip.