Semiconductor Structure for Core PMOS Height Difference Reduction
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Solution Overview
Problem
The existing semiconductor manufacturing processes face challenges in reducing the height difference between core PMOS and core NMOS areas, leading to increased complexity in subsequent processes like polishing, due to the formation of conductive layers that cause height disparities.
Innovation Solution
A method involving oxidation treatment in the core PMOS area to convert a part of the substrate into an oxide layer, followed by its removal, and forming a semiconductor layer with enhanced hole mobility, which reduces the substrate height and facilitates subsequent processes by minimizing height differences between areas.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conductive layers are formed in the core PMOS area to adjust carrier concentration, then the electrical performance is improved, but the height difference between core PMOS and core NMOS areas increases, complicating subsequent polishing processes
Solution Approach 1:
The patent applies local quality by forming a conductive layer selectively only in the core PMOS area where carrier concentration adjustment is needed, while leaving the core NMOS area unchanged. This localized approach improves electrical performance in the PMOS region without creating height differences that would complicate subsequent polishing processes, as the conductive layer is formed only where functionally necessary.
2Manufacturing precision
If the substrate thickness in core PMOS area is reduced to minimize height difference, then the uniformity for subsequent processes is improved, but the substrate structural integrity may be compromised
Solution Approach 1:
The patent applies preliminary action by forming the conductive layer in the core PMOS area before subsequent polishing and manufacturing steps. This conductive layer serves as a protective and functional layer that maintains substrate integrity while enabling the reduction of effective height difference. The layer is formed in advance to prevent substrate damage during thickness reduction and to ensure uniformity for subsequent processes without compromising structural strength.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the height difference between core PMOS and core NMOS areas, simplifying subsequent manufacturing steps and improving process efficiency by ensuring uniformity and reducing lattice damage.
Implementation Method 1
performing oxidation treatment on the substrate in the core PMOS area to convert a part of a thickness of the substrate in the core PMOS area into an oxide layer
Data Source
AI summary
A semiconductor structure and a method for manufacturing the semiconductor structure are provided. The method includes: providing a substrate including a core NMOS area, a core PMOS area and a peripheral NMOS area; performing oxidation treatment on the substrate in the core PMOS area to convert a thickness of a part of the substrate in the core PMOS area into an oxide layer; removing the oxide layer; forming a first semiconductor layer on the remaining substrate in the core PMOS area; forming a gate dielectric layer located on the first semiconductor layer and on the substrate in the core NMOS area and the peripheral NMOS area; and forming a gate on the gate dielectric layer.