Semiconductor Polishing Composition for Fine Pattern Scratch Control
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Solution Overview
Problem
Existing semiconductor polishing processes face challenges in forming fine patterns with reduced defects and scratches due to the inability to accurately control the particle size distribution and absorbance ratios of polishing particles, leading to irregularities in microcircuit patterns.
Innovation Solution
A polishing composition for semiconductor processes is developed, comprising multiple polishing particle groups with specific size distributions and absorbance ratios, defined by Equation 1, to minimize scratches and ensure stable polishing of microcircuit patterns.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional polishing compositions with broad particle size distributions are used, then polishing rate is improved, but manufacturing precision deteriorates due to scratches and defects on fine patterns
Solution Approach 1:
The polishing particles are segmented into multiple size groups (first group: 0.03-2.5 μm, second group: 0.005-0.05 μm) with specific absorbance ratios. This segmentation allows different particle size groups to perform different functions - larger particles for material removal and smaller particles for fine finishing, thereby achieving both high polishing rate and precise pattern formation without scratches
Solution Approach 2:
The invention changes the particle size distribution parameters by controlling the D50 value (0.05-0.5 μm) and the absorbance ratio (A1/A2 ≤ 1.5) between different particle size groups. By optimizing these parameters, the polishing composition achieves optimal balance between polishing rate and pattern precision, eliminating the trade-off between productivity and manufacturing precision
2Productivity
If polishing compositions with larger particles are used to increase polishing rate, then productivity is improved, but reliability deteriorates due to increased scratches and defects
Solution Approach 1:
The polishing composition uses a composite particle size distribution system combining two distinct particle groups with different size ranges and absorbance characteristics. This composite structure enables the system to simultaneously achieve high polishing rate (from larger particles) and defect-free polishing (from smaller particles with appropriate absorbance ratio), thereby improving both productivity and reliability
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The composition achieves a polishing rate of 1000 Å/min with minimal scratches (less than 1 μm) on silicon wafers, ensuring precise and reliable formation of microcircuit patterns.
Implementation Method 1
Mechanical polishing is performed while the polishing pad and the polishing composition are in contact with the wafer
Implementation Method 2
chemical polishing is performed by the chemical reaction between the polishing composition and a wafer film
Implementation Method 3
a grain size gradient is formed by centrifuging the polishing composition for a semiconductor process
Data Source
AI summary
Embodiments provide a polishing composition for a semiconductor process facilitating the formation of a microcircuit pattern and minimizing the generation of defects and scratches and a method of preparing a polished article using the same.Embodiments provide a polishing composition for a semiconductor process, in which the absorbance ratio of a group having a specific size of particle diameter compared to the overall average particle size (D50) is a predetermined ratio or less with respect to the absorbance of a group having a particle diameter more than 0.5 times and 2.5 times or less the overall average particle size.