Semiconductor Die Polymeric Anchors for Crack Reduction
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Solution Overview
Problem
Current semiconductor device singulation methods, such as mechanical dicing and laser dicing, result in defects like cracking and delamination due to chipping, residue, and heat affected zones, which reduce yield and increase costs.
Innovation Solution
A method involving the deposition of a photoresist layer over a protective overcoat layer on a semiconductor wafer, patterning to form openings for polymeric anchor locations, and using a plasma etch process to create recesses in the wafer that extend into the semiconductor substrate, thereby forming polymeric anchors during the dicing process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If mechanical dicing is used to singulate semiconductor dies, then throughput is improved and per device costs are reduced, but cracking and delamination defects occur due to chipping and residue
Solution Approach 1:
The patent replaces the mechanical dicing system with a plasma-based etching system. Instead of using a mechanical saw blade that physically cuts through the wafer, the invention uses plasma ions to chemically etch and separate the semiconductor dies along scribe lanes. This substitution eliminates mechanical contact, thereby preventing chipping, cracking, and residue generation while maintaining high throughput through parallel processing of multiple scribe lanes simultaneously.
Solution Approach 2:
The invention changes the fundamental parameter of the dicing process from mechanical force to plasma chemical etching. By controlling plasma parameters such as ion energy, gas composition, and etch rate, the process achieves clean separation without mechanical damage. The plasma process allows for precise control of etch depth and rate, enabling complete separation while preserving die integrity.
2Reliability
If laser dicing is used to singulate semiconductor dies, then cracking is reduced, but heat affected zones cause additional defects and thermal stress
Solution Approach 1:
The patent replaces the laser-based thermal process with a plasma-based chemical etching process. Instead of using laser energy that generates heat and creates thermal stress, the invention uses plasma ions to chemically remove material along scribe lanes. This cold process eliminates heat affected zones and thermal stress while still achieving clean separation and reducing cracking through the absence of mechanical contact.
3Ease of manufacture
If larger scribe lane area is allocated for mechanical sawing, then dicing can be performed, but wafer area available for forming semiconductor devices is reduced
Solution Approach 1:
The invention changes the minimum scribe lane width parameter from 60-80 microns required by mechanical sawing to approximately 10 microns enabled by plasma etching. The plasma process can effectively etch and separate dies through much narrower scribe lanes because it doesn't require mechanical blade clearance or generate lateral stress. This parameter change increases the wafer area available for device formation by about 20-25% while maintaining effective singulation capability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The polymeric anchors enhance adhesion between the polymeric material and the semiconductor die, preventing crack propagation from the scribe spacing area into the device area, thus reducing defects and increasing the reliability and yield of semiconductor devices.
Implementation Method 1
In plasma dicing, a dry etch process, such as a deep reactive-ion etching (DRIE) process, is performed in a plasma chamber. The semiconductor wafer is exposed to active ions in a plasma environment, and the bombarding ions can remove both the protective material such as passivation layers, and using different process gasses, can etch into the semiconductor substrate.
Data Source
AI summary
An example device includes: a semiconductor die formed on a semiconductor substrate and having a device side surface, a backside surface opposite the device side surface, and having sides between the device side surface and the backside surface at edges of the semiconductor die; the semiconductor die having a device area comprising electrical devices formed on the semiconductor die, and having a scribe spacing area between the device area and the edges of the semiconductor die; the semiconductor die having polymeric anchors in the scribe spacing area, the polymeric anchors being recesses that extend through a protective overcoat dielectric layer that is over the device side surface of the semiconductor die, and extending into the semiconductor substrate of the semiconductor die; and polymeric material covering at least a portion of the semiconductor die, the polymeric material filling the recesses of the polymeric anchors.