Semiconductor Package Post-Mold with Exposed Traces
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Solution Overview
Problem
Semiconductor packages with exposed conductive traces and terminals are prone to contamination, leading to electrical shorts, which existing technologies have not adequately addressed.
Innovation Solution
A protective layer is applied to cover the conductive traces while leaving the conductive terminals exposed or partially covered, using a molding material that can be an insulating or conductive material, such as solder bumps, to prevent contamination and ensure electrical integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conductive traces are exposed to enable electrical connections, then electrical connectivity is achieved, but contamination risk increases leading to electrical shorts
Solution Approach 1:
The patent applies different surface treatments to different areas: the conductive traces receive a protective coating to prevent contamination, while the contact pads remain exposed to maintain electrical connectivity. This local differentiation resolves the contradiction by protecting only the areas that need protection while keeping functional areas accessible.
Solution Approach 2:
The patent introduces an intermediate protective layer between the conductive traces and the external environment. This intermediary layer prevents direct contact between contaminants and the traces, thereby reducing contamination risk while maintaining the electrical integrity of the traces through the protective barrier.
2Object-affected harmful factors
If conductive terminals are covered to prevent contamination, then contamination prevention is improved, but electrical contact capability deteriorates
Solution Approach 1:
The patent selectively applies protective coatings only to specific regions (conductive traces) while leaving other regions (contact pads and terminals) uncovered. This local quality approach ensures that contamination prevention is achieved where needed without compromising electrical contact capability at the terminals.
Solution Approach 2:
The patent divides the surface into distinct functional zones: protected zones for conductive traces and exposed zones for contact terminals. This segmentation allows the protective measure to be applied only where necessary, maintaining both contamination prevention and electrical contact functionality.
3Object-affected harmful factors
If protective material is applied to cover all surfaces, then contamination prevention is maximized, but manufacturing complexity increases due to selective covering requirements
Solution Approach 1:
The patent segments the surface treatment process into distinct steps: applying protective material to the entire surface first, then selectively removing it from contact areas. This segmentation simplifies the manufacturing process by using a single coating step followed by a selective removal step, rather than requiring precise selective application.
Solution Approach 2:
Instead of trying to apply protective material only where needed (complex selective application), the patent inverts the approach by applying material everywhere first and then removing it from areas where it should not be present. This inversion simplifies the manufacturing process by using a blanket application followed by selective removal.
Data Source
AI summary
Method of and devices for protecting semiconductor packages are provided. The methods and devices comprise loading a leadframe containing multiple semiconductor packages into a molding device, adding a molding material on a surface of the leadframe, molding the molding material, such that the molding material covers the entire surface of the semiconductor packages except conducting terminals, and singulating the semiconductor packages from the leadframe after molding the molding material.