Semiconductor Device Power Gating with Dummy Lines
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Solution Overview
Problem
Existing semiconductor devices face increased subthreshold current and leakage currents in standby mode due to reduced threshold voltage, which are not effectively addressed by current power gating control methods that fail to differentiate source potentials for transistors in active and standby states.
Innovation Solution
The semiconductor device employs a power gating control system with high-side and low-side dummy power lines connected differently for logic circuits in standby mode, adjusting electric potentials to reduce subthreshold and leakage currents, where high-side dummy power lines are set to lower potentials and low-side dummy power lines to higher potentials compared to active mode, while maintaining logical signal levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the threshold voltage of a transistor is reduced to enable lower operation voltage (1V), then power consumption during operation is reduced, but subthreshold current in non-conductive state is increased
Solution Approach 1:
The power supply system is segmented into multiple power lines (first through sixth power lines) with different power gating control, allowing different transistors to have different source potentials. This segmentation enables independent control of power supply to different circuit blocks, reducing subthreshold current by applying appropriate potential adjustments to specific transistors that need power gating.
Solution Approach 2:
Different source potentials are applied to different transistors based on their specific requirements. The control circuit adjusts the electric potential of dummy power lines locally for transistors in standby mode, creating non-uniform potential distribution that reduces subthreshold current in specific transistors while maintaining proper operation in others.
2Stability of the object's composition
If source potential of turned-on transistor in standby mode is kept same as active mode, then logic level is maintained, but leakage current between drain and substrate cannot be reduced sufficiently
Solution Approach 1:
The control circuit changes the electric potential parameter of dummy power lines during standby mode. By adjusting the potential of dummy power lines connected to transistors in standby state, the system reduces leakage current between drain and substrate while maintaining adequate logic level stability through controlled potential changes.
Data Source
AI summary
A pair of power nodes of a logic circuit that needs to output a high level at the time of standby is connected to third and fifth dummy power lines and a pair of power nodes of a logic circuit that needs to output a low level at the time of standby are connected to second and sixth dummy power lines. Fourth, third, sixth, and fifth potentials of the second, third, fifth, and sixth dummy power lines satisfy fourth potential<third potential<first potential, and sixth potential>fifth potential>second potential. With this configuration, a leakage current flowing between a substrate and a gate of a transistor that becomes on at the time of standby, and a leakage current flowing between the substrate and a drain of a transistor that becomes off at the time of standby can be reduced.