Semiconductor Power Grid Layout for Lower IR Drop
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Solution Overview
Problem
The layout of integrated circuits (ICs) faces challenges in efficiently distributing power and ground signals due to competing space requirements with signal wiring, leading to potential IR drops and inefficiencies in power grid structures.
Innovation Solution
A power grid structure with staggered and diagonally arranged conductive wires and vias, along with connecting members, is implemented to distribute power and ground signals efficiently, reducing empty via sites and minimizing IR drops.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If power grid structures use traditional grid arrangements with regular via placement, then manufacturing is simpler, but IR drops increase due to empty via sites and uneven power distribution
Solution Approach 1:
The patent applies asymmetry by using staggered and diagonal arrangements of conductive wires and vias instead of traditional symmetric grid patterns. The via sites are intentionally positioned at asymmetric locations including diagonal intersections, creating an uneven distribution pattern that eliminates empty via sites and improves power delivery while reducing IR drops.
Solution Approach 2:
The patent introduces diagonal arrangements in addition to the traditional orthogonal grid, effectively adding a dimensional aspect to the power grid layout. This diagonal dimension allows vias to be placed at previously unused intersection points, filling empty via sites and creating a more comprehensive power distribution network.
2Loss of energy
If more vias are added to power rails to reduce IR drops, then power distribution improves, but space for signal wiring decreases
Solution Approach 1:
The patent segments the power grid into multiple interleaved subsets (e.g., first set of power rails with first subset of vias, second set of power rails with second subset of vias). This segmentation allows different via subsets to serve different power rails, enabling more efficient space utilization and reducing conflicts with signal wiring areas while maintaining comprehensive power distribution.
Solution Approach 2:
By introducing diagonal via arrangements in addition to orthogonal placements, the patent utilizes additional spatial dimensions for via placement. This allows power distribution points to be added without necessarily increasing the footprint in the primary signal wiring directions, thus reducing space conflicts.
3Ease of manufacture
If conductive wires are arranged in simple parallel patterns, then manufacturing is easier, but power distribution uniformity decreases leading to higher IR drops
Solution Approach 1:
The patent employs asymmetric conductive wire arrangements including diagonal orientations alongside traditional horizontal and vertical wires. This asymmetric multi-directional pattern creates more uniform power distribution across the substrate by reaching into areas that simple parallel patterns would miss, thereby reducing IR drops while remaining manufacturable.
Solution Approach 2:
The conductive wires in the patent serve multiple functions: they act as power rails, interconnect elements, and structural frameworks for via placement. The diagonal and staggered arrangements simultaneously improve power distribution uniformity and provide attachment points for vias, making the structure multi-functional and reducing the need for separate components.
Data Source
AI summary
A semiconductor device includes: a substrate including opposite first and second sides, a power grid structure on the second side, and a through via. The power grid structure includes: a first rail extending along a first direction, a conductive wire extending along the first direction over a length shorter than the first rail, a second rail extending along a second direction transverse to the first direction, a conductive via, and a connecting member. The second rail is below the first rail and the conductive wire. The conductive via is between and electrically couples the conductive wire to the second rail. The connecting member is between and electrically couples the first rail to the conductive wire. The through via extends through the substrate and along a third direction transverse to the first and second directions. The through via is disposed on and electrically coupled to the conductive wire.