Semiconductor Power Rail Layout With Through-Substrate Vias
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Solution Overview
Problem
Semiconductor devices face challenges in achieving high reliability and efficient power delivery due to complex and highly integrated structures, which can lead to inefficiencies in power distribution and increased area occupation.
Innovation Solution
The semiconductor device incorporates a substrate design with alternating power rails, power through vias, and well contacts that connect power delivery networks to power rails, utilizing expansion parts and triple-height power tap cells to enhance power distribution efficiency and reduce area occupation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If complex and highly integrated structures are used to satisfy increasing demand for high reliability, high speed and multi-functionality, then device performance is improved, but power distribution efficiency deteriorates and area occupation increases
Solution Approach 1:
The power distribution network is segmented into multiple power rails (first power rail, second power rail, third power rail) that are spatially separated and independently connected to the power delivery network through dedicated power through vias. This segmentation allows for localized power distribution, reducing current density in individual rails and improving overall power distribution efficiency while maintaining high reliability through redundant pathways
Solution Approach 2:
Power through vias are implemented that penetrate through the substrate from the first side to the second side, creating vertical power distribution pathways in the third dimension. This dimensional transition allows power to be delivered directly from the power delivery network on the first side to active regions on the second side, bypassing traditional planar distribution limitations and reducing power loss
2Reliability
If complex and highly integrated structures are used to satisfy increasing demand for high reliability, high speed and multi-functionality, then device performance is improved, but area occupation increases
Solution Approach 1:
By utilizing vertical power through vias that penetrate the substrate, the patent transitions power distribution from a two-dimensional planar layout to a three-dimensional structure. This allows power delivery networks and active regions to be positioned on opposite sides of the substrate, effectively utilizing the vertical dimension to reduce the horizontal area required for power distribution components while maintaining reliable electrical connections
Solution Approach 2:
The power through vias serve multiple functions simultaneously: they provide electrical connection between power delivery network and active regions, act as structural support elements, and enable three-dimensional integration. This multi-functionality reduces the need for separate dedicated structures, thereby reducing overall area occupation while maintaining high reliability
3Ease of manufacture
If traditional power distribution structures are used, then manufacturing is simpler, but power delivery reliability is insufficient
Solution Approach 1:
The power distribution system is divided into multiple independent power rails (first, second, and third power rails) with dedicated power through vias for each. This segmentation provides redundant power delivery pathways, so if one pathway fails, others can maintain power supply, thereby improving power delivery reliability while using standard semiconductor manufacturing processes for creating multiple separated structures
4Area of stationary object
If power rails are closely spaced to reduce area, then area occupation is reduced, but power distribution efficiency deteriorates
Solution Approach 1:
The patent resolves the spacing conflict by moving power delivery to the vertical dimension through substrate-penetrating power through vias. Power rails can be closely spaced horizontally to minimize area occupation, while the vertical via connections provide low-impedance power delivery pathways that prevent power distribution efficiency from deteriorating due to close spacing
Data Source
AI summary
A semiconductor device includes a substrate including a first side and a second side opposite to the first side, a first power rail and a second power rail provided on the first side of the substrate, the first power rail and the second power rail extending in a first direction and being separated in a second direction, a first active region and a second active region provided on the first side of the substrate, the first active region and the second active region being defined by an element separation film between the first power rail and the second power rail and being separated in the second direction, a power delivery network provided on the second side of the substrate, and a first power through via penetrating the element separation film and the substrate, the first power through via connecting the power delivery network and the first power rail.