Semiconductor Device Power Saving State Control

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Solution Overview

Problem

Semiconductor devices, particularly those incorporating NAND flash memory and DRAM, face challenges in reducing power consumption, as existing technologies do not effectively manage power transitions and refreshing operations in power saving modes, leading to inefficiencies in energy usage.

Innovation Solution

A semiconductor device configuration that includes a nonvolatile memory, a volatile memory, and a controller, which transitions a part of the volatile memory to a self-refresh mode upon receiving a power stop request, allowing for independent refreshing of storage areas and optimizing power supply to reduce overall power consumption by entering a super power saving state.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If the semiconductor device enters a power saving mode to reduce power consumption, then power consumption is reduced, but data retention in volatile memory becomes problematic

Engineering Contradiction:
Improvepower consumptionVSAvoiddata retention
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The volatile memory is divided into multiple storage areas, with at least one area maintained in normal operation mode while others enter self-refresh mode. This segmentation allows different parts of the memory to have different power states, enabling data retention in critical areas while reducing power consumption in less critical areas.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different storage areas of the volatile memory are assigned different operational characteristics - some areas maintain full functionality and data retention while others enter lower power states. This local differentiation of quality allows the system to optimize power consumption without compromising overall data retention reliability.

Inventive Principle:
Principle #3Local quality

2Reliability

If all storage areas of volatile memory are refreshed continuously to ensure data retention, then data retention is maintained, but power consumption increases

Engineering Contradiction:
Improvedata retentionVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The memory system implements periodic self-refresh operations only for specific storage areas that require data retention, rather than continuous refreshing of all areas. This periodic action in selected areas significantly reduces power consumption while maintaining data integrity where needed.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

Instead of applying full refreshing operations to all storage areas, the system applies partial refreshing action only to the extent necessary for data retention in critical areas, leaving other areas in lower power states without continuous refreshing.

Inventive Principle:
Principle #16Partial or excessive action

3Use of energy by moving object

If the semiconductor device transitions to a super power saving state by stopping power supply to nonvolatile memory, then power consumption is significantly reduced, but recovery time increases

Engineering Contradiction:
Improvepower consumptionVSAvoidrecovery time
Core Design Contradiction:
Use of energy by moving objectVSLoss of time

Solution Approach 1:

Before transitioning to the super power saving state, the system performs preliminary actions by maintaining certain volatile memory areas in a ready state with retained data. This preliminary preparation allows for faster recovery since critical data is already available in the volatile memory, reducing the time needed to resume operations after power supply is restored.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9612761B2Semiconductor device
Publication Date: 2017.04.04 KIOXIA CORP
  • US9612761B2 patent drawing
  • US9612761B2 patent drawing
  • US9612761B2 patent drawing

AI summary

According to one embodiment, a semiconductor device includes a nonvolatile memory, a volatile memory, and a controller. The controller is configured to transition a part of the volatile memory to a self-refresh mode when a request for stopping supplying of power to the nonvolatile memory is received.