Semiconductor Device Power Terminal Placement

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Solution Overview

Problem

In semiconductor devices with multiple chips, long power supply wiring lengths lead to increased inductance, which causes noise and malfunctions, especially in high-speed interface circuits where power supply voltage fluctuations occur due to changing operating currents.

Innovation Solution

The semiconductor device is designed with a wiring board that positions power supply voltage terminals closer to the semiconductor chip than signal terminals, reducing the length of power supply wiring and thereby minimizing inductance, thus reducing noise and malfunctions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If interface circuits are arranged along one side of the semiconductor chip and power supply voltages and interface signals are coupled as a set to external terminals, then the wiring board structure is simplified and ease of operation is improved, but the power supply wiring length increases and inductance increases causing noise and malfunctions

Engineering Contradiction:
Improveease of coupling power supply and signalVSAvoidnoise and malfunction in high-speed interface circuits
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The external terminals are segmented into two distinct groups: signal external terminals arranged along one side of the wiring board for easy coupling with interface circuits, and power supply external terminals arranged at positions that minimize wiring length to the semiconductor chip. This segmentation allows the signaling function and power supply function to be independently optimized, resolving the contradiction between ease of operation and reliability.

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If the number of interface circuits is increased to meet electronic automobile requirements, then the functionality and adaptability are improved, but the power supply wiring length and inductance increase leading to noise generation

Engineering Contradiction:
Improvenumber of interface circuitsVSAvoidnoise generation and power supply voltage fluctuation
Core Design Contradiction:
Adaptability or versatilityVSObject-affected harmful factors

Solution Approach 1:

The power supply external terminals are positioned in a different spatial dimension relative to the signal external terminals - specifically at locations that minimize the wiring path length to the semiconductor chip rather than following the linear arrangement along one side. This dimensional repositioning allows multiple interface circuits to be supported while keeping power supply wiring short, reducing inductance and noise despite increased functionality.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS10103100B2Semiconductor device
Publication Date: 2018.10.16 RENESAS ELECTRONICS CORP
  • US10103100B2 patent drawing
  • US10103100B2 patent drawing
  • US10103100B2 patent drawing

AI summary

The semiconductor device has a semiconductor chip having a first-signal-output circuit operating at a first-power-supply voltage, a second-signal-output circuit operating at a second power supply voltage, and a plurality of bump electrodes; and a wiring board including a first main surface facing the main surface of the semiconductor chip, a second main surface opposite to the first main surface with a wiring layer therebetween, first external terminals on the first main surface, and second ones on the second main surface; the former being mounted on the latter to couple the bump electrodes to the first external terminals. When viewed from the second main surface, second external terminals to be supplied with the first signal and the second signal are arranged closer to the semiconductor chip than second external terminals to be supplied with the first power supply voltage and the second power supply voltage.