Semiconductor Power Transistor Trench Insulation and Lateral Gate Alignment
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Solution Overview
Problem
Existing semiconductor devices integrating power transistor cells and lateral transistors face challenges in reliability and manufacturing costs, particularly in achieving precise control and insulation of trench structures and gate electrodes.
Innovation Solution
The method involves forming field oxide layers and trench gate electrodes through thermal oxidation, followed by the creation of protection covers and planar gate electrodes, ensuring precise insulation and alignment of source zones and drain zones in both power transistor cells and lateral transistors, with the same vertical extension.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If thermal oxidation is used to form field oxide layers lining trenches, then insulation precision of trench structures is improved, but manufacturing process complexity increases
Solution Approach 1:
The field oxide layer is formed by thermal oxidation before trench gate electrodes are created. This preliminary formation of the oxide layer ensures precise insulation is established early in the process, providing a foundation for subsequent electrode formation and reducing the need for additional insulation steps later.
Solution Approach 2:
The field oxide layer acts as an intermediary insulating layer between the semiconductor substrate and the trench gate electrodes. This oxide layer mediates the electrical isolation requirements, allowing precise insulation to be achieved through a controlled thermal oxidation process rather than requiring complex multi-layer insulation structures.
2Reliability
If protection covers are formed over cell areas, then reliability of power transistor cells is improved, but manufacturing time increases
Solution Approach 1:
Protection covers are formed over the cell areas containing power transistor trenches before subsequent processing steps. This preliminary protection prevents damage to the power transistor structures during later manufacturing operations, ensuring reliability is established early without requiring rework or additional protection steps.
Solution Approach 2:
The protection cover formation is combined with the overall manufacturing sequence such that the covers are applied during a single processing cycle. This merging of the protection step with other manufacturing operations minimizes the total time loss while still providing the necessary reliability protection for the power transistor cells.
3Productivity
If source zones and drain zones are formed with same vertical extension, then manufacturing efficiency is improved, but control precision of current flow is reduced
Solution Approach 1:
The source zones and drain zones are formed with the same vertical extension to simplify the manufacturing process and improve efficiency. This uniform vertical dimension allows for more efficient doping and fabrication steps. The control precision of current flow is maintained through the lateral geometry and electrical characteristics of the zones rather than vertical differentiation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the reliability and manufacturing efficiency of semiconductor devices by improving the precision and insulation of trench structures and gate electrodes, thereby reducing manufacturing costs and increasing the reliability of semiconductor devices.
Implementation Method 1
forming, by thermal oxidation, a field oxide layer lining first and second trenches that extend from a main surface into a semiconductor layer
Data Source
AI summary
By thermal oxidation a field oxide layer is formed that lines first and second trenches that extend from a main surface into a semiconductor layer. After the thermal oxidation, field electrodes and trench gate electrodes of power transistor cells are formed in the first and second trenches. A protection cover including a silicon nitride layer is formed that covers a cell area with the first and second trenches. With the protection cover covering the cell area, planar gate electrodes of lateral transistors are formed in a support area of the semiconductor layer.