Semiconductor Package Power Transmission Path Design
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Solution Overview
Problem
Miniaturized semiconductor device packages with a large number of input/outputs experience significant power loss due to high resistance, leading to increased power consumption and thermal issues, which are not adequately addressed by existing technologies.
Innovation Solution
A semiconductor device package design that includes a carrier with a power layer, an electrical component, and a conductive element forming a power-transmission path, where the conductive element is electrically connected to the power layer and exposed from a package body, reducing overall resistance and enhancing thermal performance through a thermal conductive layer and heat spreader.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If a high-power power supply is used on the PCB to provide sufficient power to the semiconductor device, then power loss is reduced, but power consumption and thermal problems increase
Solution Approach 1:
The patent introduces a three-dimensional power transmission architecture by adding a conductive element that extends vertically from the PCB through the substrate to the semiconductor device. This vertical dimension creates a direct power transmission path that bypasses the traditional planar routing, reducing resistance and power loss while enabling localized power delivery without increasing overall power consumption
Solution Approach 2:
The conductive element acts as an intermediary component that directly connects the power supply on the PCB to the semiconductor device. This intermediate conductive path reduces the resistance of the overall power transmission system, thereby reducing power loss without requiring increased power supply capacity that would lead to higher power consumption and thermal issues
2Loss of energy
If a high-power power supply is used on the PCB to provide sufficient power to the semiconductor device, then power loss is reduced, but thermal problems increase
Solution Approach 1:
The vertical conductive element creates a direct power transmission path that reduces resistance and power loss, thereby reducing heat generation. By shortening the current path length through the substrate, the overall power loss decreases, which directly reduces the thermal load and associated thermal problems in the device package
Solution Approach 2:
The conductive element serves as a low-resistance intermediary that efficiently transmits power from the PCB to the semiconductor device. This reduced resistance minimizes I²R heating along the power path, thereby reducing thermal problems without requiring higher power supply capacity that would generate more heat
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively decreases the overall resistance of the semiconductor device package, reducing power loss and thermal issues, while enhancing thermal performance by providing a direct power transmission path and efficient heat dissipation.
Implementation Method 1
The conductive element, the power layer, and the electrical component form a power-transmission path
Implementation Method 2
enhancing thermal performance through a thermal conductive layer and heat spreader
Data Source
AI summary
At least some embodiments of the present disclosure relate to a semiconductor device package. The semiconductor device package includes a carrier having a first surface and including a power layer adjacent to the first surface of the carrier, an electrical component disposed on the first surface of the carrier, and a conductive element disposed on the first surface of the carrier. The electrical component is electrically connected to the power layer. The conductive element is electrically connected to the power layer. The conductive element, the power layer, and the electrical component form a power-transmission path.