DRAM Signal Line Pre-Charge Control for Current Reduction
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Solution Overview
Problem
In DRAMs, there is a challenge in increasing operation frequency and reducing power supply voltage while minimizing memory cell and chip size, as existing pre-charge circuits result in high charge/discharge currents due to voltage differences between ground potential and preset potentials during data write operations.
Innovation Solution
A semiconductor device with an equalizing circuit and control circuit that independently performs pre-charge and equalization for signal input/output lines, halting pre-charge control during consecutive write operations to reduce charge/discharge current by setting the lines at an intermediate potential.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If pre-charge control is performed for signal input/output lines during consecutive write operations, then the lines are maintained at preset potential, but marked voltage difference exists between ground voltage and preset potential, increasing charge/discharge current
Solution Approach 1:
The patent applies dynamics by making the pre-charge control adaptable to operational conditions. The control circuit dynamically adjusts whether to perform pre-charge based on whether consecutive write operations are detected. During consecutive writes, pre-charge is halted to reduce current; otherwise, it is performed to maintain potential stability. This conditional, dynamic control resolves the contradiction between reliability and energy use.
Solution Approach 2:
The patent changes the operational parameter of pre-charge control based on detection results. When consecutive write operations are detected, the pre-charge control parameter is changed from 'active' to 'halted' state. This parameter change allows the system to optimize between maintaining signal integrity and reducing charge/discharge current consumption.
2Speed
If operation frequency is increased and power supply voltage is lowered, then processing speed improves, but charge/discharge current increases due to voltage differences
Solution Approach 1:
The patent uses dynamic control to adjust pre-charge operations based on operational context. During high-frequency consecutive write operations, pre-charge is halted to minimize current. This dynamic adaptation allows the system to maintain high speed operation while reducing energy consumption associated with voltage transitions.
Solution Approach 2:
The control circuit performs preliminary detection of consecutive write operations before executing pre-charge control. By detecting the operational pattern in advance, the system can proactively halt unnecessary pre-charge operations, preventing excessive charge/discharge current before it occurs, thereby enabling efficient high-speed operation.
3Reliability
If pre-charge control is continuously performed, then signal lines are maintained at preset potential, but current consumption increases during consecutive write operations
Solution Approach 1:
The patent changes the control parameter based on operational detection. When consecutive write operations are detected, the pre-charge control parameter switches from enabled to disabled state. This parameter change optimizes the balance between maintaining signal line potential reliability and minimizing energy loss during specific operational phases.
Solution Approach 2:
The system implements dynamic control where pre-charge behavior adapts to operational conditions. The control circuit continuously monitors for consecutive write operations and dynamically adjusts pre-charge execution accordingly. This dynamic approach minimizes energy loss while maintaining signal integrity when needed.
Data Source
AI summary
A semiconductor device includes an equalizing circuit and a control circuit. The equalizing circuit executes an operation of pre-charging the signal input/output line pair used for data inputting/outputting and an operation of equalizing it independently of each other. In case a plurality of data write operations occur in succession, the control circuit halts pre-charge control in the equalizing circuit in the course of consecutive write operations.