Semiconductor Device With Pre-Charged Word Line and Gate Capacitor
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Solution Overview
Problem
Current semiconductor memory devices, particularly those using oxide semiconductor materials, face challenges in controlling threshold voltage and achieving accurate data retention due to variations in threshold voltage and the need for frequent rewriting, which affects data retention and power consumption.
Innovation Solution
A semiconductor device design that includes a negatively charged word line, a bit line, and a capacitor connected to the gate terminal of a transistor, allowing for controlled switching operations and accurate data retention even with depletion mode transistors, by utilizing a capacitor to hold negative charge and control the potential of the gate terminal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Duration of action of stationary object
If a flash memory uses a floating gate to store data, then data retention period is extremely long and refresh operation is not needed, but the gate insulating layer deteriorates by tunneling current generated in writing, causing the memory element to stop functioning after a predetermined number of writing operations
Solution Approach 1:
The patent divides the gate structure into multiple segments: a conventional gate electrode and a separate charge holding region (floating gate or charge trap layer). This segmentation allows the control gate to handle writing operations while the charge holding region retains data, separating the wear-inducing writing function from the data retention function.
Solution Approach 2:
The patent introduces a charge holding region as an intermediary between the control gate and the channel. This intermediary structure (floating gate or charge trap layer) captures and holds charge without directly承受 the stress of frequent writing operations, protecting the gate insulating layer from deterioration.
2Ease of operation
If a DRAM stores data by accumulating electric charge in a capacitor, then writing and reading operations are simple, but charge is lost when data is read and frequent refresh operations are needed, increasing power consumption
Solution Approach 1:
The patent performs preliminary action by pre-charging the word line to a negative potential before reading operations. This preliminary charging state enables the transistor to maintain its off-state without requiring continuous refresh, reducing power consumption while preserving simple read/write operations.
Solution Approach 2:
The negatively charged word line serves itself by maintaining the transistor in an off-state through its own negative potential. This self-maintaining charge state eliminates the need for external refresh operations, allowing the memory to retain data without continuous power input.
3Duration of action of stationary object
If a transistor has negative threshold voltage (depletion mode), then switching control becomes difficult and accurate data retention is challenging, but the transistor can maintain off-state without continuous power supply
Solution Approach 1:
The patent applies preliminary action by pre-charging the word line to a negative potential before switching operations. This preliminary negative charge compensates for the negative threshold voltage of depletion mode transistors, enabling precise control of switching while maintaining the ability to retain data without continuous power.
Solution Approach 2:
The patent changes the electrical parameters of the word line by maintaining a negative potential. This parameter change (negative voltage) fundamentally alters the operating characteristics of depletion mode transistors, enabling them to function reliably for data retention while maintaining controllable switching behavior.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enables long-term data retention and reduced power consumption by maintaining the off-state of the transistor and allowing precise control over switching operations, even with transistors that have negative threshold voltage, thereby improving the performance of memory elements.
Implementation Method 1
a capacitor (16) having terminals one of which is electrically connected to the gate terminal of the transistor
Implementation Method 2
a negatively charged word line (19)
Data Source
AI summary
An object is to provide a semiconductor device capable of accurate data retention even with a memory element including a depletion mode transistor. A gate terminal of a transistor for controlling input of a signal to a signal holding portion is negatively charged in advance. The connection to a power supply is physically broken, whereby negative charge is held at the gate terminal. Further, a capacitor having terminals one of which is electrically connected to the gate terminal of the transistor is provided, and thus switching operation of the transistor is controlled with the capacitor.