Semiconductor Process Control With Spatial Models and Adaptive Metrology

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Solution Overview

Problem

Semiconductor wafer processing faces challenges due to increasing complexity and resource consumption in process optimization, with limited empirical exploration of the vast process space and insufficient in-line precision metrology, leading to suboptimal process solutions and inefficiencies in high-volume manufacturing.

Innovation Solution

A spatial model is built using machine-learning to predict performance, leveraging on-tool and off-tool metrology data, enabling digital scanning of knobs across the entire process space without physical wafers, and adaptive control for tighter process windows during manufacturing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If physical wafers are dedicated for design of experiment data collection, then process optimization can be performed, but valuable wafer resources are consumed

Engineering Contradiction:
Improveprocess optimizationVSAvoidwafer resources
Core Design Contradiction:
Manufacturing precisionVSQuantity of substance

Solution Approach 1:

The patent creates virtual copies of physical wafers through digital twins that replicate wafer geometry, material properties, and process responses. These virtual wafers can be processed indefinitely without consuming physical materials, allowing exhaustive process parameter exploration while preserving actual wafers for production.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The patent replaces physical mechanical processing of wafers with computational simulations. Machine learning models and physics-based solvers substitute for actual plasma etching, deposition, and other semiconductor manufacturing processes, enabling virtual experimentation without physical resource consumption.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Measurement precision

If destructive techniques like TEM are used for precision metrology, then measurement accuracy is achieved, but the technique is time consuming and cannot be integrated into production line

Engineering Contradiction:
Improveprecision metrologyVSAvoidproduction line integration
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The patent introduces virtual metrology as an intermediary between physical manufacturing and measurement. Virtual wafer models predict critical dimensions and process outcomes based on process parameters, providing rapid non-destructive measurements that bridge the gap between slow destructive TEM analysis and fast but less accurate optical metrology.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent creates virtual copies of the physical metrology measurement process. Instead of physically measuring each wafer with TEM, the system simulates the measurement process on virtual wafers using the same physical models and measurement geometries, providing rapid predictions of measurement outcomes without physical contact or time-consuming preparation.

Inventive Principle:
Principle #26Copying

3Manufacturing precision

If the space available to tune and optimize process parameters is explored thoroughly, then optimal process solution is achieved, but the complexity and time required increases significantly

Engineering Contradiction:
Improveprocess optimizationVSAvoidprocess complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent performs preliminary virtual exploration of the entire process parameter space before physical experimentation. Digital twins simulate thousands of process parameter combinations to identify promising regions, allowing engineers to focus physical DoE on a limited set of optimized parameters rather than exhaustively searching the entire space.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements closed-loop feedback where virtual wafer results continuously inform process parameter adjustments. Machine learning models learn from simulated outcomes and automatically suggest optimal parameter settings, reducing the need for complex manual optimization and iterative physical experimentation.

Inventive Principle:
Principle #23Feedback

Data Source

PatentEP4276891B1Advanced semiconductor process optimization and adaptive control during manufacturing
Publication Date: 2025.11.26 APPLIED MATERIALS INC
  • EP4276891B1 patent drawingFigure 1A
  • EP4276891B1 patent drawingFigure 1B
  • EP4276891B1 patent drawingFigure 2~3

AI summary

A spatial model is built to predict performance of a processing chamber. The spatial model is used to converge faster to a desired process during the process development phase. A system for controlling device performance variability during manufacturing includes a process platform, on-board metrology (OBM) tools, and a machine-learning based process control model. The system receives SEM metrology data, and updates the process control model periodically (e.g., wafer-to-wafer, lot-to-lot, chamber-to-chamber etc.) using machine learning techniques. Periodic update of the process control model may account for chamber-to-chamber variability.