Semiconductor Protection Layer Blocks Etchant Gas Penetration
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Solution Overview
Problem
The reduction of transistor channel length in semiconductor devices faces physical and electrical limitations, and the introduction of strain materials to improve performance is hindered by etchant gases penetrating through surface defects during source/drain deposition, leading to altered profiles and decreased yield and electrical performance.
Innovation Solution
A protection layer, typically made of amorphous silicon or other strain materials, is deposited in the cavities adjacent to the channel region to block etchant gases, preventing them from penetrating into the substrate and altering the source/drain profiles, thereby maintaining predetermined profiles and enhancing yield and electrical performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If etchant gases are used during epitaxial growth to remove surface defects, then surface quality improves, but source/drain profiles are altered and yield decreases
Solution Approach 1:
A protection layer is introduced as an intermediary between the substrate and the etchant gases during epitaxial growth. This protection layer allows the etchant gases to perform their function of removing surface defects while preventing them from penetrating into the substrate and altering the source/drain profiles. The protection layer thus mediates between the conflicting requirements of surface quality improvement and profile accuracy maintenance.
Solution Approach 2:
The protection layer is formed in advance before the epitaxial growth process begins. By preparing the protection layer beforehand, the substrate is pre-protected against the harmful effects of etchant gases, allowing the subsequent epitaxial growth to proceed without profile alteration while still enabling surface defect removal when needed.
2Productivity
If channel length is reduced to improve transistor performance, then drive current increases, but manufacturing precision and electrical performance deteriorate due to high electric field limits
Solution Approach 1:
The protection layer serves as an intermediary that enables shorter channel lengths to be manufactured with greater precision. By protecting the substrate during epitaxial growth, it allows for better control of the channel region dimensions, thereby enabling the realization of high drive current devices with short channels while maintaining manufacturing precision.
3Reliability
If strain materials are introduced to improve carrier mobility, then electrical performance improves, but etchant gases penetrate through surface defects and alter source/drain profiles
Solution Approach 1:
The protection layer acts as an intermediary that allows strain materials to be successfully introduced into the source/drain regions. It enables the epitaxial growth of strained semiconductor materials to improve carrier mobility while simultaneously preventing etchant gases from penetrating through surface defects and altering the source/drain profiles, thus resolving the contradiction between electrical performance improvement and manufacturing precision.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The protection layer effectively blocks etchant gases, ensuring accurate source/drain profiles and improving both yield and electrical performance by preventing unintended penetration and maintaining strain-induced carrier mobility and drive current.
Implementation Method 1
A protection layer, typically made of amorphous silicon or other strain materials, is deposited in the cavities adjacent to the channel region to block etchant gases, preventing them from penetrating into the substrate
Implementation Method 2
epitaxially growing a semiconductor material to fill the cavity by an epitaxial deposition process
Data Source
AI summary
A semiconductor device includes: a gate structure on a substrate; a raised source/drain region adjacent to the gate structure; a channel region under the gate structure; and a protection layer between the substrate and the raised source/drain region. The protection layer is interposed between the substrate and the raised source/drain region. An atom stacking arrangement of the protection layer is different from the substrate and the raised source/drain region.