Semiconductor Device Protective Layer for Etching Damage

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Solution Overview

Problem

Conventional semiconductor devices face limitations in minimizing component sizes due to damage in the patterning process, leading to compromised device characteristics, especially in narrow width patterns.

Innovation Solution

A method involving the formation of a high-k dielectric layer, a metal-containing layer, and a semiconductor layer, followed by anisotropic etching and exposure to reactive nitrogen and/or oxygen-containing gases to create protective particles that form a protective layer with different etching selectivity, which is used as an etch mask to minimize damage and maintain device characteristics.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If component sizes are minimized to increase integration density, then productivity is improved, but manufacturing precision deteriorates due to pattern damage

Engineering Contradiction:
Improveintegration densityVSAvoidpattern integrity
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

A protective layer is formed on the semiconductor layer before etching operations. This protective layer acts as a sacrificial barrier that prevents damage to the narrow width patterns during subsequent etching processes, allowing minimal damage even when patterns are slightly affected

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The protective layer serves as an intermediary between the etching process and the semiconductor layer. It absorbs the harmful effects of etching byproducts and physical damage, protecting the underlying narrow width patterns while allowing the etching to proceed

Inventive Principle:
Principle #24Intermediary (Mediator)

2Area of stationary object

If narrow width patterns are formed to minimize component sizes, then area is reduced, but reliability deteriorates due to pattern damage

Engineering Contradiction:
Improvecomponent sizeVSAvoiddevice characteristics
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The protective layer is formed in advance before any etching operations on the narrow width patterns. This preliminary protective coating ensures that even if etching causes slight damage, the critical narrow width patterns maintain their integrity and device characteristics

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The protective layer acts as a cushioning barrier that absorbs mechanical and chemical stress during etching. It provides beforehand protection against the harmful effects of etching byproducts and physical damage to the narrow width patterns

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach allows for the fabrication of semiconductor devices with improved reliability and reduced etching damage, enabling the creation of semiconductor devices with precise control over feature sizes and maintaining device characteristics, even at smaller scales.

Implementation Method 1

the separated poly semiconductor is nitrified and/or oxidized by the reactive nitrogen and/or oxygen-containing gas to form protective particles

Methodology Applied
Scientific EffectNitrification: Nitriding

Implementation Method 2

the separated poly semiconductor is nitrified and/or oxidized by the reactive nitrogen and/or oxygen-containing gas to form protective particles

Methodology Applied
Scientific EffectOxidation: Oxidation

Implementation Method 3

anisotropically etching the semiconductor layer

Methodology Applied
Scientific EffectAnisotropic etching:

Data Source

PatentUS9608054B2Semiconductor device and method for fabricating the same
Publication Date: 2017.03.28 SAMSUNG ELECTRONICS CO LTD
  • US9608054B2 patent drawing
  • US9608054B2 patent drawing
  • US9608054B2 patent drawing

AI summary

A semiconductor device and a method of fabricating the same include a semiconductor substrate, a high-k dielectric pattern and a metal-containing pattern sequentially being stacked on the semiconductor substrate, a gate pattern including poly semiconductor and disposed on the metal-containing pattern, and a protective layer disposed on the gate pattern, wherein the protective layer includes oxide, nitride and/or oxynitride of the poly semiconductor.