Semiconductor Device With Protruding Gate Electrode
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Miniaturization of transistors leads to short-channel effects, causing leakage currents and deteriorating memory retention characteristics, with existing solutions like high-concentration impurity doping in silicon substrates resulting in junction leakage and increased manufacturing costs due to the need for complex structures like U-shaped grooves.
Innovation Solution
A transistor design with a gate electrode featuring protrusions extending in the channel width direction and a gate insulating film covering these protrusions, increasing the effective channel length and width without the need for vertically long grooves, using a multi-tone mask to reduce photolithography steps and manufacturing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If a transistor is miniaturized to reduce memory cell size, then integration degree is improved, but short-channel effect occurs causing leakage current and deteriorating memory retention characteristics
Solution Approach 1:
The patent introduces a three-dimensional transistor structure with a vertically long groove instead of planar miniaturization. The groove extends vertically into the substrate, creating an effective channel length that is longer than the apparent channel length measured at the surface. This dimensional transition from 2D to 3D allows maintaining longer effective channel length while reducing the apparent footprint, thus suppressing short-channel effect and improving memory retention characteristics.
Solution Approach 2:
The gate insulating film and gate electrode are formed within the vertically long groove, nesting the gate structure inside the substrate rather than on the surface. This nested configuration allows the gate to control a longer channel region while occupying minimal surface area, resolving the contradiction between miniaturization and short-channel effect suppression.
2Reliability
If high-concentration impurity doping is applied to prevent leakage current, then short-channel effect is suppressed, but junction leakage current increases and memory retention characteristics deteriorate
Solution Approach 1:
Instead of using high-concentration impurity doping in the planar direction, the patent extends the channel length vertically into the substrate by forming a groove. This allows achieving sufficient effective channel length for short-channel effect suppression without requiring high doping concentrations that would cause junction leakage, thus resolving the contradiction between short-channel effect suppression and junction leakage prevention.
3Reliability
If a U-shaped vertically long groove is formed to maintain effective channel length, then short-channel effect is suppressed, but manufacturing complexity and cost increase due to additional photolithography steps
Solution Approach 1:
The patent combines the formation of the vertically long groove with the existing gate electrode formation process. The gate insulating film and gate electrode are formed within the groove using the same photolithography and deposition steps that would be used for planar gate formation, merging the 3D groove structure creation with the standard gate fabrication process and avoiding additional photolithography steps.
Solution Approach 2:
The vertically long groove structure is designed to be self-aligned with the source and drain regions. The groove positioning is determined by the self-aligned nature of the formation process, where the groove automatically aligns with the underlying structures without requiring separate alignment steps, thus reducing manufacturing complexity while maintaining effective channel length.
4Ease of manufacture
If sputtering or plasma CVD is used to form gate insulating film in vertically long groove, then deposition is achieved, but groove becomes embedded with deposition material requiring expensive ALD or thermal oxidation methods
Solution Approach 1:
The patent specifies that the vertically long groove has a curved cross-section rather than a sharp rectangular shape. This curvature allows deposition materials to conformally coat the groove walls without accumulating at sharp corners or becoming embedded, enabling the use of cost-effective sputtering or plasma CVD methods while achieving excellent film coverage and avoiding the need for expensive ALD or thermal oxidation processes.
Data Source
AI summary
A semiconductor device of the present invention includes a gate electrode which includes a pair of first protrusions and a second protrusion provided between the pair of first protrusions; a gate insulating film covering the gate electrode; a semiconductor film which is in contact with the gate insulating film and overlaps with the pair of first protrusions and the second protrusion; and a pair of electrodes which is in contact with the semiconductor film and overlaps with the pair of first protrusions. The side edges of the semiconductor film are on the outer sides than the top surfaces of the pair of first protrusions in the direction of the channel width of the semiconductor film. The side edges of the pair of electrodes are on the outer sides than the top surfaces of the pair of first protrusions in the direction of the channel width of the semiconductor film.