Semiconductor Device Pseudo Gate Reduces Over-Etching
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Solution Overview
Problem
Conventional semiconductor devices face issues with irregular SiGe growth on the edge of active areas, leading to over-etching and impaired device performance due to incomplete silicon planes and non-uniform morphology, which complicates contact component formation and increases leakage current.
Innovation Solution
A semiconductor device design featuring a substrate with active areas connected by a connection component, where a pseudo gate covers the groove isolation, ensuring complete silicon planes for SiGe growth and reducing over-etching, and electrically isolating devices to improve manufacturing tolerance and performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If SiGe is grown on the edge of the active area in conventional devices, then device performance is improved, but irregular growth morphology occurs leading to over-etching and increased leakage current
Solution Approach 1:
A connection component is formed beforehand to connect adjacent active areas, providing a pre-prepared structure that guides SiGe growth. This preliminary structure ensures complete silicon planes are available at the edges of active areas before SiGe deposition, preventing irregular morphology while maintaining device performance.
Solution Approach 2:
The connection component acts as an intermediary structure between adjacent active areas. It provides a mediating platform that ensures uniform SiGe growth by providing complete silicon planes, thereby preventing the irregular growth that would otherwise occur at the edges of active areas.
2Reliability
If groove isolation is used to separate active areas, then device isolation is achieved, but incomplete silicon planes are formed at the edges leading to irregular SiGe growth
Solution Approach 1:
The device structure is segmented into distinct components: active areas, groove isolations, and connection components. The connection component is specifically positioned to bridge the gap created by groove isolation, providing complete silicon planes at the edges of active areas where SiGe growth occurs, thus resolving the shape issue while maintaining isolation.
Solution Approach 2:
The connection component serves as an intermediary that bridges the isolation created by groove structures. It provides the missing complete silicon planes at the edges of active areas without compromising the isolation function, enabling uniform SiGe growth while maintaining device separation.
3Ease of manufacture
If contact components are formed in conventional devices, then electrical connection is achieved, but over-etching occurs due to irregular SiGe morphology
Solution Approach 1:
The connection component is formed in advance to establish complete silicon planes at the edges of active areas. This preliminary structure ensures that when contact components are later formed, the underlying SiGe layer has uniform morphology, preventing over-etching and simplifying the contact formation process.
Solution Approach 2:
The connection component provides a cushioning effect by ensuring complete silicon planes are present before contact component formation. This pre-prepared structure protects against over-etching during subsequent processing steps, maintaining manufacturing precision while enabling easy contact formation.
Data Source
AI summary
A semiconductor device and its operation method, relating to semiconductor technology. The semiconductor device comprises a substrate and an active area on the substrate, wherein the active area comprises a first active area and a second active area positioned along an extension direction of the first active area, the first active area comprises a first component, a second component, and a connection component, wherein the first component and the second component each directly contact a side of the connection component, wherein the second active area comprises a third component and a fourth component being separated by a groove isolation, the groove isolation in the second active area corresponds to the connection component in the first active area. The semiconductor device further comprises a first pseudo gate covering the connection component and the groove isolation. This inventive concept reduces over-etching when forming contact components.