Semiconductor Device P-Well Ion Field Leakage Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current semiconductor device fabrication methods result in current leakage at the edge or under the source/drain region, reducing the breakdown voltage of high voltage devices, which is a challenge for integrating high, medium, and low voltage devices.
Innovation Solution
A method involving a substrate with a P-well, where a low voltage device area and a high voltage device area are defined, and a P-type ion field is formed outside the high voltage device area using a photolithography process with a photomask, ensuring the ion field does not overlap with the high voltage area to reduce leakage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a field implantation process is used to reduce the vertical electric field of the channel, then the integration capability of high voltage devices is improved, but current leakage occurs at the edge or under the source/drain region, reducing breakdown voltage
Solution Approach 1:
The substrate is divided into distinct high voltage device area and low voltage device area. The field implantation process is selectively applied only to the low voltage device area, segmenting the treatment zones to prevent current leakage in the high voltage area while maintaining integration capability.
Solution Approach 2:
Different regions of the substrate are given different properties through selective doping. The low voltage device area receives P-type ion doping to reduce vertical electric field, while the high voltage device area remains undoped to maintain high breakdown voltage, achieving local optimization of each region's characteristics.
2Reliability
If P-type ions are doped into the substrate to form an ion field, then breakdown voltage is increased by reducing current leakage, but the ion field must be precisely positioned outside the high voltage device area, increasing manufacturing complexity
Solution Approach 1:
A photoresist layer is formed and patterned before the ion implantation process. This preliminary patterning creates a mask that defines the exact boundaries of the low voltage device area, ensuring that P-type ions are deposited only in the correct region and preventing overlap with the high voltage device area.
Solution Approach 2:
A photoresist layer is introduced as an intermediary material to mediate the ion implantation process. The photoresist acts as a temporary mask that protects the high voltage device area during doping, allowing precise positioning of the P-type ion field without direct complex positioning requirements.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach increases the breakdown voltage of semiconductor devices by reducing current leakage, enhancing the operational voltage range by approximately 40% compared to prior art, with the breakdown voltage increased from about 54 V to 76 V.
Implementation Method 1
P-type ion field is formed outside of the high-voltage device area by selectively doping P-type ions into the substrate
Implementation Method 2
A pattern of the photomask is transferred to the photoresist layer on the substrate by a photolithography process using the photomask
Data Source
AI summary
A method for fabricating a semiconductor device is provided. A substrate comprising a P-well is provided. A low voltage device area and a high voltage device area are defined in the P-well. A photoresist layer is formed on the substrate. A photomask comprising a shielding region is provided. The shielding region is corresponded to the high voltage device area. A pattern of the photomask is transferred to the photoresist layer on the substrate by a photolithography process using the photomask. A P-type ion field is formed outside of the high-voltage device area by selectively doping P-type ions into the substrate using the photoresist layer as a mask.