Semiconductor Quality Management Server Post-Shipment Testing

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Solution Overview

Problem

Current semiconductor product quality management systems fail to achieve a 100% failure detection rate before shipment, leading to untested nodes being shipped, which can result in market failures.

Innovation Solution

A semiconductor product quality management server that manages the quality of semiconductor devices by storing test history information, acquiring and transmitting additional test patterns to devices post-shipment, executing and registering the test results, thereby increasing the failure detection rate.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If pre-shipment testing is performed based on market failure rate standards, then the failure rate can be suppressed to below a certain level, but the failure detection rate cannot reach 100% and untested nodes are shipped

Engineering Contradiction:
Improvefailure rateVSAvoidfailure detection rate
Core Design Contradiction:
ReliabilityVSMeasurement precision

Solution Approach 1:

The system performs preliminary testing before shipment based on market failure rate standards to suppress failure rates below certain levels, while accepting that not all nodes can be tested. This preliminary action establishes a baseline quality level before additional post-shipment testing enhances detection capability.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system performs partial testing of semiconductor nodes before shipment rather than exhaustive testing of all nodes, which is practical given resource constraints. Post-shipment, additional test patterns are applied to partially cover the untested nodes, achieving excessive action that pushes the failure detection rate closer to 100% without requiring complete pre-shipment testing of everything.

Inventive Principle:
Principle #16Partial or excessive action

2Measurement precision

If additional test patterns are executed after shipment, then the failure detection rate increases, but more time and resources are required for testing

Engineering Contradiction:
Improvefailure detection rateVSAvoidtesting time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

Instead of performing all testing in a single pre-shipment phase, the system divides testing into periodic actions: initial pre-shipment testing establishes baseline quality, then additional test patterns are periodically applied post-shipment to progressively increase failure detection rate without requiring continuous or exhaustive immediate testing.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The testing process continues beyond shipment rather than stopping at the traditional pre-shipment point. The useful action of testing is extended continuously into the post-shipment phase, allowing failure detection to accumulate over time without interrupting the product lifecycle, thereby increasing overall detection rate while distributing time investment.

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentUS10845414B2Semiconductor product quality management server, semiconductor device, and semiconductor product quality management system
Publication Date: 2020.11.24 RENESAS ELECTRONICS CORP
  • US10845414B2 patent drawing
  • US10845414B2 patent drawing
  • US10845414B2 patent drawing

AI summary

An additional test pattern acquiring unit acquires a test pattern, which is not yet executed to the semiconductor device serving as a target of executing an additional test among test patterns stored in a test pattern information DB, as an additional test pattern with reference to a semiconductor manufacturing history information DB. Also, an additional test transmitting unit transmits the additional test pattern acquired by the additional test pattern acquiring unit to the semiconductor device serving as the target of the additional test through a network. An additional test result acquiring unit acquires a test execution result together with an ID of the semiconductor device, and a registration unit registers identification information of the executed test pattern, an execution result of the test pattern, and an execution timing of the test in a semiconductor product history information DB so as to be associated with the acquired ID of the semiconductor device.