Semiconductor Device Real-Time Schedule Unit Task Switching
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Solution Overview
Problem
Current semiconductor devices face performance degradation due to task switching delays and input/output data handling inefficiencies, particularly when dealing with unpredictable input data order and the need for data compression/decompression, which disrupt real-time performance in network systems.
Innovation Solution
A semiconductor device with a real-time schedule unit that monitors input data availability and prioritizes tasks, utilizing a hardware-based real-time operating system to manage multiple masters and slaves, and includes a data determination register to optimize task execution by determining when input data is ready, thereby reducing task switch time and improving real-time performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If a hardware RTOS is used to shorten task switch time, then task switching speed is improved, but the system complexity increases
Solution Approach 1:
The patent replaces the software-based RTOS with a hardware-based RTOS that uses dedicated hardware circuits to manage task switching. This substitution of mechanical/software system with hardware circuitry directly reduces task switch time while the modular design keeps complexity manageable
Solution Approach 2:
The hardware RTOS is divided into separate functional modules including a task scheduler, a data determination register, and a task execution unit. This segmentation allows each component to perform its specific function efficiently while maintaining overall system manageability
2Productivity
If tasks are executed in parallel to improve throughput, then processing speed is improved, but task scheduling complexity increases
Solution Approach 1:
The patent implements preliminary action by using the data determination register to check whether input data is ready before a task can execute. This pre-check mechanism allows the task scheduler to make informed decisions about task execution order, enabling parallel processing while maintaining simple scheduling logic based on data availability
3Ease of manufacture
If FIFO storage is used for input/output data, then data handling is simplified, but real-time performance decreases due to copy operations
Solution Approach 1:
The patent introduces an intermediary mechanism where the data determination register acts as a mediator between the FIFO storage and task execution. Instead of tasks waiting for data in a traditional FIFO system, the register proactively determines data readiness and enables tasks to execute immediately when data is available, eliminating unnecessary copy operations while maintaining FIFO's simplicity
Data Source
AI summary
A semiconductor device capable of executing a plurality of tasks in real time and improving performances is provided. The semiconductor device comprises a plurality of processors and a plurality of DMA controllers as master, a plurality of memory ways as slave, and a real-time schedule unit for controlling the plurality of masters such that the plurality of tasks are executed in real time. The real-time schedule unit RTSD uses the memory access monitor circuit and the data determination register to determine whether or not the input data of the task has been determined, and causes the task determined to have the input data determined to have been determined to be executed preferentially.