Semiconductor Device Recess Cathode Electrode Solder Wettability

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Solution Overview

Problem

Conventional semiconductor diodes face manufacturing complexity and solder wettability issues due to the absence of a cathode electrode in the recess, leading to increased manufacturing steps and potential ohmic defects during diode mounting.

Innovation Solution

A semiconductor device with a recess formed by trenching the n+-type cathode layer in the terminal region, where the cathode electrode is also formed within the recess, simplifying the manufacturing process and improving breakdown resistance by reducing carrier accumulation and enhancing solder adhesion.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If the cathode electrode is not formed in the recess, then the manufacturing process becomes simpler, but ohmic defects occur during mounting and solder wettability is poor

Engineering Contradiction:
Improvemanufacturing process simplicityVSAvoidsolder wettability and mounting quality
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

Instead of leaving the recess empty as in conventional designs, the invention inverts the approach by forming the cathode electrode within the recess. This reversal of the conventional design resolves the contradiction by simultaneously achieving simple manufacturing (through unified electrode formation) and improved solder wettability (through metal filling the recess cavity).

Inventive Principle:
Principle #13The other way round (Inversion)

Solution Approach 2:

The cathode electrode acts as an intermediary element that fills the recess cavity, mediating between the silicon substrate and the solder. This metallic intermediary improves heat conduction and provides a reliable bonding interface, resolving both the manufacturing simplicity and mounting reliability requirements.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If the cathode electrode is formed in the recess, then solder wettability and mounting reliability improve, but the manufacturing process becomes more complex

Engineering Contradiction:
Improvesolder wettability and mounting qualityVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The invention merges the cathode electrode formation with the existing cathode layer structure. By forming the cathode electrode over the entire back surface including the recess area in a single step, it combines multiple functions (cathode contact and recess filling) into one unified process, thereby improving reliability without significantly increasing manufacturing complexity.

Inventive Principle:
Principle #5Merging (Combining)

3Device complexity

If carriers are accumulated in the terminal region, then the diode structure is simpler, but breakdown resistance decreases due to concentrated recovery currents

Engineering Contradiction:
Improvediode structure simplicityVSAvoidbreakdown resistance
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The invention applies local quality by creating a recess specifically in the terminal region where carriers accumulate, while leaving the active region unchanged. This localized structural modification redistributes the carrier density and recovery current density only where needed, improving breakdown resistance without complicating the overall diode structure.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The recess changes the physical parameter of carrier concentration distribution in the terminal region. By reducing the volume of the n+-type cathode layer in the terminal region, the invention modifies the local carrier density parameter, which disperses recovery currents and improves breakdown resistance while maintaining structural simplicity.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS9455355B2Semiconductor device
Publication Date: 2016.09.27 MITSUBISHI ELECTRIC CORP
  • US9455355B2 patent drawing
  • US9455355B2 patent drawing
  • US9455355B2 patent drawing

AI summary

An n−-type semiconductor substrate (1) includes an active region and a terminal region disposed outside the active region. A p+-type anode layer (2) is formed in a portion of an upper surface of the n−-type semiconductor substrate (1) in the active region. A plurality of p+-type guard ring layers (3) are formed in a portion of the upper surface of the n−-type semiconductor substrate (1) in the terminal region. An n+-type cathode layer (5) is formed in a lower surface of the n−-type semiconductor substrate (1). An anode electrode (6) is connected to the p+-type anode layer (2). A metallic cathode electrode (7) is connected to the n+-type cathode layer (5). A recess (8) is formed by trenching the n+-type cathode layer (5) in the terminal region. The cathode electrode (7) is also formed in the recess (8).