Semiconductor Recess Formation via Segmented Dry and Wet Etching

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Solution Overview

Problem

The morphology of semiconductor layers in recessed source/drain type MOSFETs can deteriorate due to dry etching, leading to crystalline disorder and electrical characteristic degradation, particularly at lower growth temperatures.

Innovation Solution

A method involving the formation of a first recess by dry etching and a second recess by wet etching, followed by epitaxial growth of a semiconductor layer, using an etchant containing hydrogen peroxide and ammonia to remove etching damage and maintain planarity and crystallinity, with epitaxial growth occurring at temperatures between 450°C and 600°C to suppress misfit dislocations and dopant diffusion.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If dry etching is used to form the recess, then the recess can be formed with good aspect ratio control, but etching damage and crystalline disorder occur on the recess surface

Engineering Contradiction:
Improverecess formation precisionVSAvoidetching damage
Core Design Contradiction:
Manufacturing precisionVSObject-affected harmful factors

Solution Approach 1:

The single etching process is segmented into two distinct steps: first dry etching to form the recess with good aspect ratio control, then wet etching to remove the etching damage layer. This segmentation allows each process to optimize for its specific function without compromising the other.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A wet etching step is introduced as an intermediary process between dry etching and epitaxial growth. This intermediate wet etching removes the harmful etching damage created by dry etching, preparing a clean surface for subsequent epitaxial growth while preserving the recess geometry.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If epitaxial growth is performed at lower temperatures, then misfit dislocations are suppressed, but the morphology of the semiconductor layer deteriorates due to etching damage

Engineering Contradiction:
Improvemisfit dislocation suppressionVSAvoidsemiconductor layer morphology
Core Design Contradiction:
ReliabilityVSShape

Solution Approach 1:

The wet etching step is performed preliminarily before epitaxial growth to remove etching damage and oxides from the recess surface. This preliminary cleaning action ensures that when epitaxial growth occurs at lower temperatures, the semiconductor layer morphology remains excellent without the negative effects of etching damage.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively removes etching damage, maintains the morphology of the semiconductor layer, and improves the electrical characteristics of MOSFETs by ensuring uniform Ge concentration and reducing strain, thereby enhancing current driving capability.

Implementation Method 1

forming a second recess by removing a bottom and sidewalls of the first recess by wet etching

Methodology Applied
Scientific EffectWet etching:

Implementation Method 2

a Chemical Vapor Deposition (CVD) method is used for the epitaxial growth of the semiconductor layer

Methodology Applied
Scientific EffectChemical Vapor Deposition: Chemical Vapour Deposition

Implementation Method 3

epitaxial growth of a semiconductor layer

Methodology Applied
Scientific EffectEpitaxial growth: Epitaxy

Implementation Method 4

a Chemical Vapor Deposition (CVD) method is used for the epitaxial growth of the semiconductor layer

Methodology Applied
Scientific EffectChemical Vapor Deposition: Chemical Vapour Deposition

Data Source

PatentUS8455324B2Method of manufacturing a semiconductor device
Publication Date: 2013.06.04 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US8455324B2 patent drawing
  • US8455324B2 patent drawing
  • US8455324B2 patent drawing

AI summary

A method of manufacturing a semiconductor device which includes forming a gate insulating film and a gate electrode over a semiconductor substrate, forming a first recess in the first semiconductor substrate on both sides of the gate electrode by dry etching, forming a second recess by removing a bottom and sidewalls of the first recess by wet etching, and forming a semiconductor layer in the second recess.