Semiconductor Recess Epitaxy for Defect Reduction
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Solution Overview
Problem
The formation of high-quality thin films of germanium, silicon germanium, and III-V compound semiconductors is hindered by high defect densities due to lattice constant and thermal expansion coefficient mismatches with existing substrate materials, leading to inefficient integrated circuit formation processes.
Innovation Solution
A method involving the formation of recesses in shallow trench isolation regions, followed by epitaxial growth of semiconductor materials from these recesses, combined with nitrogen annealing to reduce stacking faults and defect densities, is employed. This process includes adjusting etching solution concentrations and temperatures to maximize the area of (111) surfaces, and controlling the depth ratio of trench profiles to achieve low defect densities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If germanium, silicon germanium, or III-V compound semiconductors are grown from silicon or SiC substrates, then the semiconductor films can be formed, but high defect densities occur due to lattice constant and thermal expansion coefficient mismatches
Solution Approach 1:
The patent introduces an intermediary substrate or buffer layer between the silicon/SiC substrate and the III-V compound semiconductor or germanium layer. This intermediary layer serves as a transition medium that reduces the lattice mismatch and thermal expansion coefficient difference, thereby enabling film formation while significantly reducing defect densities. The intermediary layer acts as a mediator that bridges the incompatible properties of the substrate and the target semiconductor material.
2Manufacturing precision
If recesses are formed in shallow trench isolation regions to grow semiconductors, then defect densities are reduced compared to blanket silicon wafers, but defect densities remain high
Solution Approach 1:
The patent applies local quality by creating recesses with specific geometric characteristics (particular depths, widths, and aspect ratios) in the shallow trench isolation regions. These locally optimized recess structures provide favorable growth conditions specifically at the interfaces where semiconductors are deposited, reducing dislocation densities and improving crystal quality in critical areas without requiring complete substrate replacement.
Solution Approach 2:
The patent systematically varies key parameters including recess depth, recess width, aspect ratio, etching solution concentration, and temperature to optimize semiconductor growth quality. By changing these parameters, the patent achieves better lattice matching and reduced defect densities, transforming the growth conditions from suboptimal to optimized states.
3Ease of manufacture
If standard etching conditions are used to form recesses, then recesses can be formed, but the area of (111) surfaces is not maximized leading to higher defect densities
Solution Approach 1:
The patent optimizes etching parameters including solution concentration, temperature, and etching time to maximize the exposure of (111) crystal planes in the recess structures. By carefully controlling these parameters, the etching process selectively removes material to reveal larger areas of (111) surfaces, which serve as low-defect growth templates for subsequent semiconductor deposition, thereby improving overall film quality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method significantly reduces defect densities in semiconductor regions, enhancing the quality of FinFETs by minimizing stacking faults and improving drive current and leakage current performance, with defect densities dropping substantially when the depth ratio of trench profiles is maintained below 0.6.
Implementation Method 1
performing an annealing on the semiconductor material
Implementation Method 2
performing an epitaxy to grow a semiconductor material in the recess
Data Source
AI summary
A method includes recessing a portion of a semiconductor substrate between opposite isolation regions to form a recess. After the step of recessing, the portion of the semiconductor substrate includes a top surface. The top surface includes a flat surface, and a slant surface having a (111) surface plane. The slant surface has a bottom edge connected to the flat surface, and a top edge connected to one of the isolation regions. The method further includes performing an epitaxy to grow a semiconductor material in the recess, wherein the semiconductor material is grown from the flat surface and the slant surface, and performing an annealing on the semiconductor material.


