Semiconductor Package Recessed Chip Adhesion Layer
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing semiconductor device package structures either increase costs with spacer chips or face issues with tilted or distorted memory chips when using thick die attach films, leading to difficulties in stacking and bonding due to potential contact and protrusion problems.
Innovation Solution
A semiconductor device design that eliminates the spacer chip by using a resin substrate with a second semiconductor chip having a recessed area over the first chip and an adhesion layer to prevent contact, allowing for efficient stacking and bonding without increasing package size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If a spacer chip is used to heighten the memory chip, then the package size is reduced, but the manufacturing cost increases
Solution Approach 1:
The invention extracts and eliminates the spacer chip component from the package structure by using a thick die attach film instead, thereby reducing manufacturing cost while maintaining the vertical stacking configuration that reduces package size
Solution Approach 2:
The invention changes the parameter of the die attach film thickness to be greater than 10 μm, replacing the need for a spacer chip and achieving both cost reduction and structural stability
2Ease of manufacture
If a thick die attach film is used instead of a spacer chip, then the manufacturing cost is reduced, but the memory chip becomes tilted or distorted
Solution Approach 1:
The invention optimizes the die attach film thickness parameter to be greater than 10 μm but less than half the memory chip thickness, and controls the film's physical properties (viscosity 100-10000 cps at application temperature) to prevent memory chip tilting and distortion while maintaining cost advantages
Solution Approach 2:
The thick die attach film acts as a cushioning layer that compensates for dimensional variations and prevents memory chip distortion before stacking, eliminating the need for spacer chips while maintaining manufacturing precision
3Volume of moving object
If the die attach film is squashed, then the package density is increased, but the memory chip contacts the controller chip and bonding becomes difficult
Solution Approach 1:
The invention sets the die attach film thickness to be greater than 10 μm and controls its flow characteristics (viscosity 100-10000 cps) to prevent excessive squashing during stacking, thereby avoiding contact between memory chip and controller chip while maintaining high package density
4Strength
If the die attach film protrudes to the bonding pad, then the structural integrity is maintained, but wire bonding becomes difficult
Solution Approach 1:
The invention controls the die attach film viscosity (100-10000 cps at application temperature) and thickness to prevent protrusion onto the bonding pad area, ensuring both structural integrity and ease of wire bonding
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design reduces package size and prevents contact between memory and controller chips, maintaining efficient bonding and stacking while avoiding the drawbacks of spacer chips and thick die attach films.
Implementation Method 1
an adhesion layer which is provided at least between the first region of the second semiconductor chip and the substrate
Data Source
AI summary
A semiconductor device includes a substrate, first and second semiconductor chips, an adhesion layer, and a resin layer. The first and second semiconductor chips are provided on a surface of the substrate. The second semiconductor chip includes, on a side thereof facing the substrate, a first region and a second region that is recessed from the first region and is above at least part of the first semiconductor chip or at least part of a wire that electrically connects the first semiconductor chip and the substrate. The adhesion layer is provided at least between the first region of the second semiconductor chip and the substrate. The resin layer is on the surface of the substrate and enclosing the first and second semiconductor chips.