Semiconductor Recipe Execution With Buffered Time-Series Control
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Solution Overview
Problem
Conventional semiconductor manufacturing systems face inefficiencies due to sequential execution of process recipes, leading to latencies and delays that hinder precision and repeatability, especially with increasing complexity and precision demands.
Innovation Solution
A system and method that converts process recipes into time series instructions, utilizes local subsystem buffers, and employs a flexible communication framework with shared and dedicated links to synchronize subsystem clocks, minimizing latency and enhancing communication efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If sequential execution of process recipes is used, then system simplicity is maintained, but latency and delays increase
Solution Approach 1:
The patent segments the process recipe into multiple time series instructions that can be executed in parallel across different subsystems. Each subsystem receives and executes specific instructions independently, eliminating the sequential bottleneck while maintaining overall process coordination through the buffered instruction approach.
Solution Approach 2:
The system performs preliminary conversion of the process recipe into time series instructions and stores them in buffers before execution. This pre-processing allows subsystems to retrieve and execute instructions without waiting for sequential processing, reducing execution latency while keeping the control architecture manageable.
2Speed
If shared data bus is used for communication, then system complexity is reduced, but communication speed and flexibility are limited
Solution Approach 1:
The communication infrastructure is segmented into shared data buses for general communication and dedicated communication links for critical subsystems. This segmentation allows high-speed dedicated paths where needed while maintaining system-wide connectivity through shared buses, balancing speed requirements with infrastructure complexity.
Solution Approach 2:
The shared data bus serves multiple subsystems and functions, providing a universal communication backbone that reduces overall system complexity. Meanwhile, dedicated links provide specialized high-speed paths for time-critical communications, creating a multi-functional communication architecture that balances speed and simplicity.
3Manufacturing precision
If process recipes are executed sequentially, then control simplicity is maintained, but manufacturing precision and repeatability deteriorate
Solution Approach 1:
The system pre-converts process recipes into detailed time series instructions with precise timing information before execution. This preliminary preparation ensures that each subsystem receives pre-calculated, precision-critical instructions that can be executed with high accuracy, improving manufacturing precision while keeping real-time control simpler.
Solution Approach 2:
The process recipe is copied and transformed into multiple time series instruction sets, one for each subsystem. This copying approach allows each subsystem to execute its specific instructions with high precision independently, while the overall process maintains repeatability through the structured instruction format.
Data Source
AI summary
Disclosed herein is a control system for semiconductor manufacturing, focusing on reducing process recipe execution latency. The control system converts a process recipe into time series instructions and control signals for subsystem actuators, stored in subsystem local buffers for rapid executions. Latencies for various subsystems are managed by adjusting control signal execution timings. This approach enhances operational speed and repeatability, utilizing a mix of shared data bus and dedicated communication links for efficient data transfer.