Semiconductor Structure With Redistribution Layers

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Solution Overview

Problem

The challenge in miniaturizing ultrasonic sensors lies in the long electrical transmission path between the piezoelectric array and the application-specific integrated circuit (ASIC) due to wire bonding and PCB routing, which hinders the miniaturization of semiconductor integrated circuits for ultrasonic sensing applications.

Innovation Solution

The use of redistribution layers and through vias to shorten the transmission path between the piezoelectric array and the ASIC, with a front side redistribution layer attached to the sensing element and a back side redistribution layer attached to the ASIC, electrically connected by the through via, allowing for a more compact semiconductor structure.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Length of moving object

If wire bonding and PCB routing are used to connect piezoelectric array and ASIC, then electrical connection is achieved, but transmission path length becomes too long

Engineering Contradiction:

Improvetransmission path lengthVSAvoidmanufacturing complexity

Core Design Contradiction:

Length of moving objectVSEase of manufacture

Solution Approach 1:

The patent merges the piezoelectric array and ASIC into a single integrated semiconductor structure, eliminating the need for separate wire bonding and PCB routing. The electrical connection is achieved through integrated conductive paths within the same substrate, reducing transmission path length while maintaining manufacturing feasibility through standardized semiconductor fabrication processes

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The patent introduces a carrier substrate as an intermediary component that integrates both the piezoelectric array and ASIC. This carrier serves as a common platform that provides electrical interconnection through integrated trace routing, eliminating the need for external wire bonding and reducing the transmission path between the two components

Inventive Principle:

Principle #24Intermediary (Mediator)

2Adaptability or versatility

If multiple layouts for piezoelectric array to ASIC connection are used, then connection flexibility is improved, but device complexity increases

Engineering Contradiction:

Improveconnection flexibilityVSAvoidstructural complexity

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The carrier substrate is designed with universal electrical interconnection capabilities that can accommodate different piezoelectric array configurations and ASIC types. The integrated trace routing provides multiple connection paths and routing options within a single standardized platform, eliminating the need for multiple specialized layout designs while maintaining connection flexibility

Inventive Principle:

Principle #6Universality (Multi-functionality)

3Reliability

If wire bond mold is used for connection, then electrical connection is achieved, but gap between cover layer and sensor increases

Engineering Contradiction:

Improveconnection reliabilityVSAvoidgap distance

Core Design Contradiction:

ReliabilityVSLength of stationary object

Solution Approach 1:

The patent merges the electrical connection function into the integrated semiconductor structure itself, eliminating the need for a separate wire bond mold. The carrier substrate provides both mechanical support and electrical interconnection in a single integrated component, reducing the overall height and eliminating the gap between the cover layer and sensor that would be required to accommodate a wire bond mold

Inventive Principle:

Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enhances sensitivity by reducing the transmission path length to approximately 20 μm, enabling more compact and efficient ultrasonic sensing semiconductor structures.

Implementation Method 1

a sensing element configured to receive a signal from a sensing target

Methodology Applied

Scientific EffectPiezoelectric effect: Piezoelectric Effect

Data Source

PatentUS10183858B2Semiconductor structure and method of manufacturing the same

Publication Date: 2019.01.22 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

The present disclosure provides a semiconductor structure includes a sensing element configured to receive a signal from a sensing target, a molding surrounding the sensing element, a through via in the molding, a front side redistribution layer disposed at a front side of the sensing element and electrically connected thereto, and a back side redistribution layer disposed at a back side of the sensing element, the front side redistribution layer and the back side redistribution layer are electrically connected by the through via. The present disclosure also provides a method for manufacturing the semiconductor structure described herein.