Semiconductor Device Reference Voltage Generation for Test Mode

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Solution Overview

Problem

Conventional semiconductor devices cannot generate a test reference voltage that reaches the target voltage level during a test operation mode, especially when the mode register set (MRS) setting operation has not been performed, leading to unreliable operations.

Innovation Solution

A semiconductor device with a normal code generation unit, test code output unit, reference voltage generation unit, multiplexer, and data driving unit that can generate and switch between normal and test reference voltages based on mode signals, allowing for independent operation of test reference voltage generation irrespective of MRS setting.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a normal reference voltage generation circuit is used in test operation mode, then the circuit structure remains simple, but the test reference voltage does not reach the target voltage level

Engineering Contradiction:
Improvetest operation reliabilityVSAvoidreference voltage generation circuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The reference voltage generation circuit is segmented into two independent paths: a normal reference voltage generation path using the MRS and a test reference voltage generation path using a test code input unit. This segmentation allows each path to be optimized for its specific function, enabling reliable test operations without compromising the normal operation circuit.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A mode register set (MRS) is introduced as an intermediary component that can be selectively configured. The MRS serves as a mediator between the test code input unit and the reference voltage generation circuit, allowing the system to switch between normal and test operation modes while maintaining voltage level accuracy in both modes.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of operation

If the MRS setting operation is performed before test operation, then the reference voltage can be properly set, but the test operation cannot be performed before MRS setting

Engineering Contradiction:
Improvetest operation accessibilityVSAvoidvoltage level accuracy
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The test code input unit is configured to accept test codes and generate test reference voltages before the MRS setting operation is completed. This preliminary action capability allows test operations to be performed independently of the MRS setting sequence, improving ease of operation while maintaining voltage level accuracy through the dedicated test code processing path.

Inventive Principle:
Principle #10Preliminary action

3Manufacturing precision

If a single reference voltage generation path is used, then the device complexity is reduced, but the voltage level cannot be accurately maintained in both normal and test modes

Engineering Contradiction:
Improvevoltage level precisionVSAvoiddual reference voltage generation structure
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

Different quality standards are applied to different operational modes: the normal reference voltage generation path is optimized for normal operation precision, while the test reference voltage generation path is optimized for test operation precision. This local quality approach allows each path to achieve high voltage level precision for its specific purpose without requiring a single overly complex unified path.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS8947132B2Semiconductor device and semiconductor system including the same
Publication Date: 2015.02.03 SK HYNIX INC
  • US8947132B2 patent drawing
  • US8947132B2 patent drawing
  • US8947132B2 patent drawing

AI summary

A semiconductor device includes a normal code generation unit capable of generating a normal code, a test code output unit capable of storing a plurality of preliminary test codes to output a test code in response to a test control signal, and a reference voltage generation unit capable of generating a normal reference voltage in a normal operation mode and generating a test reference voltage in a test operation mode in response to the normal code and the test code.