Semiconductor Device Reinforcement for Curing Stress

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Solution Overview

Problem

Semiconductor devices using large-sized support substrates face issues with flexure and stress concentration during the curing process of the insulating layer, leading to cracking and disconnection failures in reliability tests, especially when the substrate and semiconductor element have different thermal expansion coefficients.

Innovation Solution

Incorporating a reinforcement portion, such as an interconnection thickness reinforcement portion or an insulating layer thickness reinforcement portion, above the outer periphery of the semiconductor element to augment the mechanical strength of the burying insulating layer and fan-out interconnections, which are connected to the semiconductor element without being part of the fan-out interconnections.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a large-sized support substrate is used for mass production, then productivity and cost are improved, but flexure and stress concentration occur during curing leading to cracking and disconnection failures

Engineering Contradiction:
Improvemass production efficiencyVSAvoidresistance to flexure and cracking
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies local quality by providing reinforcement portions only in specific areas above the outer periphery of the semiconductor element, rather than uniformly throughout the entire support substrate. This targeted reinforcement approach addresses the local stress concentration problem at critical areas while maintaining the overall large substrate size for productivity, thus resolving the contradiction between mass production efficiency and resistance to flexure-induced cracking.

Inventive Principle:
Principle #3Local quality

2Ease of manufacture

If the burying insulating layer is cured at high temperature, then manufacturing process is completed, but thermal expansion difference causes flexure and stress concentration

Engineering Contradiction:
Improvecuring process completionVSAvoidthermal stress from expansion difference
Core Design Contradiction:
Ease of manufactureVSStress or pressure

Solution Approach 1:

The patent implements beforehand cushioning by placing reinforcement portions in advance above the outer periphery of the semiconductor element before the curing process. These reinforcement portions act as preventive measures that cushion against the thermal stress and flexure that will occur during high-temperature curing, thereby allowing the curing process to be completed while mitigating the harmful thermal expansion differences between materials.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

3Reliability

If reinforcement portions are added to prevent cracking, then reliability is improved, but device complexity increases

Engineering Contradiction:
Improveresistance to cracking during temperature cyclingVSAvoidstructural complexity of support substrate
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent resolves the contradiction between reliability and device complexity by applying reinforcement portions only in specific local areas above the outer periphery of the semiconductor element, rather than uniformly throughout the entire substrate. This localized approach enhances cracking resistance at critical stress points while minimizing the overall structural complexity and material usage, thus improving reliability without proportionally increasing device complexity.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The reinforcement portions enhance the mechanical strength and reliability of the semiconductor device, improving cyclic temperature test characteristics and reducing the risk of cracking, thereby increasing the operational reliability and production efficiency while maintaining a low cost and thin thickness.

Implementation Method 1

a reinforcement portion arranged in a preset area above the outer periphery of the semiconductor element for augmenting the mechanical strength of the burying insulating layer and the fan-out interconnection

Methodology Applied
Scientific EffectMechanical reinforcement:

Implementation Method 2

there is enclosed a semiconductor element in a wiring board inclusive of a support substrate... a burying insulating layer on the support substrate for burying the semiconductor element therein

Methodology Applied
Scientific EffectCuring:

Implementation Method 3

a fan-out interconnection led out from the pad to an area on the burying insulating layer lying more peripherally outwardly than the semiconductor element

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Data Source

PatentUS8344498B2Semiconductor device
Publication Date: 2013.01.01 GODO KAISHA IP BRIDGE 1
  • US8344498B2 patent drawing
  • US8344498B2 patent drawing
  • US8344498B2 patent drawing

AI summary

A semiconductor device comprises: a semiconductor element; a support substrate arranged on a surface of the semiconductor element opposite to a surface thereof provided with a pad, the support substrate being wider in area than the semiconductor element; a burying insulating layer on the support substrate for burying the semiconductor element therein; a fan-out interconnection led out from the pad to an area on the burying insulating layer lying more peripherally outwardly than the semiconductor element; and a reinforcement portion arranged in a preset area on top of outer periphery of the semiconductor element for augmenting the mechanical strength of the burying insulating layer and the fan-out interconnection.