Semiconductor Relay Layout for Low-Loss High-Frequency Signals
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Solution Overview
Problem
Semiconductor relays experience increasing insertion loss with higher transmission signal frequencies, and there is a demand for smaller and more efficient signal transmission in high-frequency ranges.
Innovation Solution
A semiconductor relay design featuring a specific arrangement of MOSFETs and a connecting conductor configuration that reduces parasitic capacitance by positioning MOSFETs and a light-receiving driver device to minimize capacitive coupling, with a circuit board layout that includes dielectric and ground layers to further reduce transmission loss.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the transmission signal frequency is increased to improve signal transmission speed, then the signal transmission speed is improved, but the insertion loss increases
Solution Approach 1:
The patent extracts and removes the light-receiving driver device from the direct signal path between the light-receiving device and the MOSFET gate. By placing the driver device on a separate mounting part rather than directly on the MOSFET, the signal path is shortened and parasitic capacitance is reduced, allowing high-frequency signals to pass with minimal insertion loss while maintaining the driver's ability to control the MOSFET gate.
Solution Approach 2:
The patent introduces a dedicated signal transmission line as an intermediary between the light-receiving device and the MOSFET gate, bypassing the parasitic capacitance of the driver device. This intermediary path allows high-frequency signals to transmit efficiently while the driver device operates separately to control the MOSFET, resolving the conflict between high-speed transmission and low insertion loss.
2Volume of moving object
If the size of the semiconductor relay is reduced to meet miniaturization demands, then the device size is reduced, but the signal transmission properties in high-frequency range deteriorate
Solution Approach 1:
The patent transitions from a planar layout to a three-dimensional stacked configuration. The light-receiving driver device is placed on a separate mounting part above or beside the MOSFET, utilizing the vertical dimension rather than expanding the horizontal footprint. This dimensional change allows compact integration while maintaining optimized signal paths for high-frequency transmission.
Solution Approach 2:
The patent nests the light-receiving driver device within the overall housing structure, positioning it on a mounting part that is integrated into the relay's internal architecture. This nested configuration allows the driver device to occupy space that would otherwise be unused, achieving miniaturization without compromising the signal transmission path between the light-receiving device and MOSFET.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design achieves a smaller semiconductor relay with reduced insertion loss, enabling efficient high-frequency signal transmission.
Implementation Method 1
a light-emitting device electrically connected to the first input terminal and the second input terminal
Implementation Method 2
a light-receiving device that receives light output from the light-emitting device
Data Source
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AI summary
A semiconductor relay includes first and second input terminals, a light-emitting device, a light-receiving driver device, first and second output terminals, first and second MOSFETs, and a connecting conductor. The connecting conductor is provided on the rear surface of the light-receiving driver device and connects a first source electrode of the first MOSFET to a second source electrode of the second MOSFET. The connecting conductor includes first to third connecting conductive parts. Each of the first and second connecting conductive parts is disposed between the light-receiving driver device and a corresponding one of the first and second source electrodes.