Semiconductor Device Relay Lead Wire Length Reduction
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Solution Overview
Problem
In semiconductor devices, particularly those with a configuration where multiple semiconductor chips are controlled by a single control semiconductor chip, the long wire lengths between chips and the control chip lead to reliability issues due to wire contact failures and increased parasitic resistance and inductance, compromising the device's electrical characteristics and manufacturing cost.
Innovation Solution
The semiconductor device employs a conductive member, such as a relay lead, to electrically couple the control pad of the semiconductor chip with the electrode pad of the control semiconductor chip, with the relay lead having a distinct structure from the external leads, thereby reducing wire length and minimizing the risk of wire contact failures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If semiconductor chips are directly coupled to the control semiconductor chip by wires, then the device complexity is reduced, but the wire length increases leading to reliability degradation
Solution Approach 1:
The patent introduces a lead frame as an intermediary component between the semiconductor chips and the control semiconductor chip. The lead frame provides pre-formed connection paths that reduce wire length and eliminate the need for direct wire bonding between all components, thereby maintaining structural simplicity while improving connection reliability through shorter, more stable electrical paths.
2Adaptability or versatility
If the number of semiconductor chips coupled to the control semiconductor chip increases, then the device functionality is enhanced, but the distance between chips and the control chip increases leading to longer wire lengths
Solution Approach 1:
The patent utilizes the lead frame's three-dimensional structure to provide multiple connection paths and routing options. By leveraging the spatial arrangement of the lead frame, the invention can connect an increased number of semiconductor chips to the control chip without proportionally increasing wire length, as the lead frame provides optimized electrical paths that accommodate multiple connections efficiently.
3Quantity of substance
If longer wires are used to connect semiconductor chips to the control chip, then the device can accommodate more chips, but parasitic resistance and inductance increase degrading electrical characteristics
Solution Approach 1:
The lead frame serves as an intermediary that provides low-resistance, optimized electrical paths between multiple semiconductor chips and the control chip. By using the lead frame's pre-formed conductive structures instead of long direct wires, the invention reduces parasitic resistance and inductance while maintaining the capability to connect multiple chips, thereby preserving electrical characteristics even as chip quantity increases.
Data Source
AI summary
To improve the reliability of a semiconductor device. A chip mounting portion TAB5 is arranged to be shifted to the +x direction side. Further, a gate electrode pad of a semiconductor chip CHP1 (LV) and a pad of a semiconductor chip CHP3 are electrically coupled by a wire W1a and a wire W1b through a relay lead RL1. Likewise, a gate electrode pad of a semiconductor chip CHP1 (LW) and the pad of the semiconductor chip CHP3 are electrically coupled by a wire W1c and a wire W1d through a relay lead RL2. At this time, the structures of parts of the relay leads RL1 and RL2, which are exposed from a sealing body MR are different from the structures of respective parts exposed from the sealing body MR, of a plurality of leads LD1 and LD2 which function as external terminals.