Semiconductor Repair Device Using Dummy Mats for Yield Improvement
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Solution Overview
Problem
High integration and high-speed semiconductor memory devices face yield reduction due to failed memory cells, as existing repair technologies are inefficient in replacing faulty cells with redundancy cells, leading to decreased manufacturing costs and product quality.
Innovation Solution
A repair device that utilizes cells from dummy mats as redundancies, employing a selection controller and driving controller to selectively couple local input/output lines and sensing circuits, allowing for the replacement of failed cells with dummy cells from adjacent mats, thereby increasing yield.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional repair circuits with dedicated redundancy columns/rows are used, then failed cells can be replaced, but device complexity increases and manufacturing precision requirements increase
Solution Approach 1:
The patent makes dummy mats serve dual purposes: their original function plus serving as redundancy cells for repair. Instead of dedicating separate redundancy columns/rows solely for repair, the dummy mats located at peripheral regions are utilized as additional redundancy resources, allowing one structure to fulfill multiple functions and thereby reducing overall device complexity while maintaining repair capability
Solution Approach 2:
The patent recovers unused dummy mats that would otherwise be discarded or underutilized peripheral structures and repurposes them as functional redundancy cells. By selecting and activating dummy cells from these peripheral dummy mats through control logic, the system recovers potential repair resources that were previously inactive, increasing yield without adding new structural elements
2Reliability
If more redundancy cells are added to replace failed cells, then yield increases, but device area and manufacturing cost increase
Solution Approach 1:
The dummy mats are pre-positioned at peripheral regions during the initial design phase, before any failure occurs. These dummy cells are prepared in advance as standby resources and can be quickly activated through control logic when failures are detected, eliminating the need for additional area that would be required if redundancy cells were added after manufacturing
Solution Approach 2:
Instead of adding redundancy cells within the main memory array plane (two-dimensional expansion), the patent utilizes dummy mats located in peripheral regions (spatial repositioning to different dimensional zones). This approach leverages unused peripheral space rather than encroaching on the active memory area, effectively adding repair capacity without increasing the core device footprint
Data Source
AI summary
A repair device may be provided. The repair device may include a selection controller configured to control an upper select signal and a lower select signal in correspondence to a fail address and an upper signal and a lower signal which represent a failed region of each mat. The repair device may include a driving controller configured to selectively control a selection control signal in correspondence to the upper select signal and the lower select signal. The repair device may include a bank configured to selectively couple local input/output lines and a sensing circuit of a corresponding mat in correspondence to the selection control signal, and may replace and repair a failed cell of a normal mat with a dummy cell of an upper mat or a lower mat in correspondence to a column select signal.