Semiconductor Repeater Circuit for SSN and ISI Mitigation
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Solution Overview
Problem
In semiconductor systems, the increase in data bits and phases during transmission leads to frequent occurrences of simultaneous switching noise (SSN) and inter-symbol interference (ISI) phenomena, which existing data bus inversion schemes struggle to effectively mitigate.
Innovation Solution
The semiconductor device incorporates a flag signal generation circuit and an operation control circuit to perform data masking and data bus inversion operations, using a repeater to align data and interrupt or buffer it based on logic levels and control signals, thereby managing noise and interference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If data bus inversion scheme is used to suppress SSN and ISI phenomena, then noise and interference are reduced, but the scheme becomes complex and difficult to implement effectively
Solution Approach 1:
The patent divides data transmission into multiple phases (first phase data bits and second phase data bits) with different inversion schemes applied to each phase. The data bus inversion control signal is segmented to control different groups of data bits differently, making the complex inversion scheme more manageable and implementable while effectively suppressing noise and interference.
Solution Approach 2:
The patent dynamically adjusts the data bus inversion scheme based on the phase of data transmission. During first phase transmission, one inversion pattern is applied, while during second phase transmission, a different inversion pattern is applied. This dynamic adaptation allows effective noise suppression without requiring a single complex fixed scheme.
2Manufacturing precision
If data masking operation is performed to store only desired bits, then data precision and reliability are improved, but additional control signals and operations increase system complexity
Solution Approach 1:
The patent combines the data masking operation with the phased data bus inversion scheme. The mask write command is integrated with the existing data transmission phases, and the masking operation is performed using the same control infrastructure. This merging reduces overall system complexity while achieving precise data storage.
Solution Approach 2:
The patent introduces a flag signal as an intermediary to coordinate the data masking operation with the phased data bus inversion scheme. The flag signal generation circuit uses the write command and mask write command as inputs to generate control signals that synchronize the masking operation with data transmission phases, simplifying the control logic while maintaining precision.
Data Source
AI summary
A semiconductor device includes a repeater configured to output latch data as aligned data when the operation control signal is disabled and configured to interrupt the input of the latch data when the operation control signal is enabled for performing a data masking operation of internal data. The operation control signal is enabled according to logic levels of the internal data when a flag signal is enabled and a write data control signal is enabled.