Semiconductor Reset Circuit Synchronizing Program Counter
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Solution Overview
Problem
Semiconductor devices face issues with over-specification due to asynchronous input of reset commands during running operations, leading to abnormal states and inefficiencies in reset operations.
Innovation Solution
A semiconductor device that resets the program counter within a microcontroller and performs a reset check code from a ROM algorithm when a reset command is input, ensuring synchronized reset times across different operations, and includes a reset circuit to stop running algorithms and perform a unified reset operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If reset check codes are positioned at different locations for different operations, then the device can handle various operation types, but the reset times become different causing over-spec
Solution Approach 1:
The patent segments the reset check codes into separate locations for different operations (program operation, reading operation, erase operation) while maintaining a unified reset mechanism. Each operation type has its own reset check code positioned at a specific location in the algorithm, allowing the device to handle different operation types while ensuring synchronized reset times through the reset circuit's control over the program counter.
2Adaptability or versatility
If multiple subroutines are used for reset operations, then the device can handle different operation states, but the complexity of reset operations increases
Solution Approach 1:
The patent implements a universal reset mechanism that handles multiple operation states (program operation, reading operation, erase operation) through a single unified reset circuit. The reset circuit controls the program counter to execute the appropriate reset check code based on the current operation state, eliminating the need for separate reset subroutines for each operation type and thereby reducing overall system complexity while maintaining adaptability.
Data Source
AI summary
The present disclosure relates to a semiconductor device and a method of operating the semiconductor device. The semiconductor device includes a ROM for storing a program algorithm, an erase algorithm, a reading algorithm, and a reset algorithm and outputting ROM data corresponding to a selected algorithm, a program counter for outputting a ROM address to the ROM so as to sequentially operate the selected algorithm, an internal circuit for performing an operation corresponding to the selected algorithm in response to a plurality of internal circuit control signals in response to the ROM data, and a reset circuit for stopping progress of a running algorithm by initializing the program counter in response to a reset command input from an outside, and performing the reset algorithm.