Semiconductor Device Signal Delay Compensation via Resin Dielectric Tuning
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Solution Overview
Problem
In laminated semiconductor packages, differences in wiring lengths between semiconductor chips result in varying signal delay times, making it difficult to enhance signal processing speed, and existing solutions fail to significantly reduce these delays.
Innovation Solution
A semiconductor device design featuring a substrate with bumps, where the first and second semiconductor chips are connected via bonding wires of different lengths, with a first resin seal having a higher dielectric constant than a second resin seal, allowing for adjustment of signal delay times and increased timing margins.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If bonding wires of different lengths are used to connect semiconductor chips to substrate, then signal transmission is enabled for multiple chips, but signal delay time differences occur between chips
Solution Approach 1:
The patent changes the dielectric constant parameter of the resin seal materials. By using a first resin seal with dielectric constant ε1 and a second resin seal with dielectric constant ε2 where ε1 > ε2, the patent adjusts the electrical characteristics of the signal transmission path to compensate for the delay time differences caused by bonding wire length variations.
Solution Approach 2:
The patent applies different dielectric constant values at different locations around the bonding wires. The region around the first bonding wire has a higher dielectric constant (ε1) while the region around the second bonding wire has a lower dielectric constant (ε2), creating localized electrical property variations that compensate for the structural asymmetry in bonding wire lengths.
2Loss of time
If bonding wire lengths are changed to adjust delay times, then signal delay adjustment is possible, but manufacturing difficulty increases and reliability decreases
Solution Approach 1:
Instead of changing the physical length parameter of the bonding wires, the patent changes the dielectric constant parameter of the surrounding resin seal materials. This approach maintains the simplicity of bonding wire manufacturing while achieving delay time adjustment through material property modification.
Solution Approach 2:
The patent introduces resin seals as intermediary elements between the bonding wires and the external environment. These resin seals with different dielectric constants act as mediators that adjust the electrical characteristics of the signal transmission path without requiring direct modification of the bonding wires themselves.
3Loss of time
If bonding wire diameters are changed to adjust delay times, then signal delay adjustment is possible, but connection reliability is negatively affected
Solution Approach 1:
The patent changes the dielectric constant parameter of the resin seal materials instead of modifying the bonding wire diameter. This approach achieves delay time adjustment while maintaining the original bonding wire specifications that ensure reliable mechanical and electrical connections.
Solution Approach 2:
The patent creates localized variations in the electrical properties of the resin seal materials surrounding different bonding wires. This allows independent adjustment of the electrical characteristics for each signal path without affecting the mechanical integrity or connection reliability of the bonding wires.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively reduces signal delay time differences between chips, enhancing signal processing speed and increasing timing margins for input/output operations.
Implementation Method 1
a dielectric constant ε1 of the first resin seal is higher than a dielectric constant ε2 of the second resin seal
Data Source
AI summary
A semiconductor device includes a substrate having bumps on the backside thereof, a first semiconductor chip mounted on the surface of the substrate, a second semiconductor chip mounted on the first semiconductor chip above the surface of the substrate, a first bonding wire having a length L1 for connecting the first semiconductor chip to the substrate, a second bonding wire having a length L2 (where L2>L1) for connecting the second semiconductor chip to the substrate, a first resin seal having a dielectric constant ∈1 for sealing the first bonding wire, and a second resin seal having a dielectric constant ∈2 (where ∈2<∈1) for sealing the second bonding wire. The relationship between the lengths L1 and L2 and the dielectric constants ∈1 and ∈2 is defined by an equation of ∈1=∈2(L2/L1)2.