Semiconductor Resin Layering for Flat Chip-Stack Packaging

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Solution Overview

Problem

The existing methods for manufacturing semiconductor devices with stacked NAND flash memory chips face challenges in achieving high yield and reliability due to issues with resin layer flatness and stress on semiconductor elements, leading to bonding wire formation defects and increased package height as memory capacity increases.

Innovation Solution

A method involving the use of masks with specific opening shapes and resin precursors to form resin layers with perpendicular side surfaces, which reduces swelling and stress, and includes a multi-layer resin structure with precise curing and masking steps to ensure high flatness and adhesion, thereby improving yield and reducing defects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If a film-like insulating material is used to seal the controller chip, then the packaging process is simplified, but the resin layer flatness deteriorates and stress on semiconductor elements increases

Engineering Contradiction:
Improvepackaging process simplicityVSAvoidresin layer flatness
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent divides the sealing structure into multiple resin layers (first resin layer and second resin layer) with different functions. The first resin layer provides primary sealing while the second resin layer ensures flatness, thereby resolving the contradiction between ease of manufacture and manufacturing precision by segmenting the sealing function across multiple layers.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies different material properties to different regions of the sealing structure. The first resin layer uses materials with specific flow characteristics for complete filling, while the second resin layer uses materials optimized for flatness. This local differentiation resolves the contradiction by optimizing each layer's properties for its specific function.

Inventive Principle:
Principle #3Local quality

2Strength

If resin is completely filled in the opening, then adhesion is improved, but swelling increases and flatness deteriorates

Engineering Contradiction:
ImproveadhesionVSAvoidflatness
Core Design Contradiction:
StrengthVSShape

Solution Approach 1:

The patent segments the filling function across two resin layers. The first resin layer is completely filled to ensure adhesion strength, while the second resin layer is applied in a controlled manner to maintain flatness. This segmentation allows each layer to optimize for its primary function without compromising the other.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies partial filling to the second resin layer, using a controlled amount of resin that does not completely fill the opening. This partial action maintains adhesion while preventing excessive swelling and preserving flatness, thereby resolving the contradiction between adhesion strength and shape maintenance.

Inventive Principle:
Principle #16Partial or excessive action

3Quantity of substance

If memory capacity is increased by stacking more chips, then functionality is improved, but package height increases and stress on elements worsens

Engineering Contradiction:
Improvememory capacityVSAvoidpackage height
Core Design Contradiction:
Quantity of substanceVSLength of stationary object

Solution Approach 1:

The patent changes the physical parameters of the resin materials, specifically their flow characteristics and curing properties. By selecting resins with appropriate viscosity and curing rates, the patent enables effective filling and stress distribution in multi-chip stacks without proportionally increasing package height, thus resolving the contradiction between memory capacity and package dimensions.

Inventive Principle:
Principle #35Parameter changes

4Ease of manufacture

If conventional sealing methods are used, then process simplicity is maintained, but bonding wire formation defects increase

Engineering Contradiction:
Improveprocess simplicityVSAvoidbonding wire formation quality
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent segments the sealing process into two distinct resin application steps, each optimized for specific quality requirements. The first resin layer ensures complete filling and adhesion, while the second resin layer provides flatness and stress control, creating optimal conditions for bonding wire formation without significantly complicating the overall process.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent uses composite resin structures with different material properties in each layer. The first resin layer may contain materials optimized for flow and adhesion, while the second resin layer contains materials optimized for flatness and stress distribution. This composite approach improves bonding wire formation quality while maintaining process simplicity.

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method enhances the flatness of resin layers, reduces bonding wire formation defects, and minimizes stress on semiconductor elements, resulting in improved manufacturing yield and package reliability as memory capacity increases.

Implementation Method 1

curing the first resin precursor to obtain a first resin layer

Methodology Applied
Scientific EffectCuring: Phase Change

Data Source

PatentUS20240105681A1Method of manufacturing semiconductor device and semiconductor device
Publication Date: 2024.03.28 KIOXIA CORP
  • US20240105681A1 patent drawing
  • US20240105681A1 patent drawing
  • US20240105681A1 patent drawing

AI summary

According to one embodiment, a method of manufacturing a semiconductor device includes placing a first semiconductor element on a wiring board, forming a first mask having an opening on the wiring board so that the first semiconductor element is positioned in the opening, putting a liquid first resin precursor into the opening of the first mask, curing the first resin precursor to obtain a first resin layer, and then removing the first mask.