Semiconductor Apparatus With RESURF Layer For High-Voltage Wiring
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Solution Overview
Problem
The existing semiconductor apparatuses using SOI substrates face challenges in achieving high breakdown voltage due to electric field localization and dielectric breakdown issues caused by high-voltage wiring crossing over dielectric isolation trenches, leading to reduced isolation performance and increased manufacturing costs.
Innovation Solution
The semiconductor apparatus incorporates a p− diffusion layer in contact with an n+ drain layer and a p+ diffusion layer, forming a RESURF layer and stopper region respectively, to reduce electric field strength on the insulator film and prevent dielectric breakdown, with a T-shaped trench connection providing effective shielding and stable manufacturing processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high-voltage wiring crosses over dielectric isolation trenches to connect drain to high-potential floating region, then electrical connection is achieved, but electric field localization occurs causing dielectric breakdown and reduced breakdown voltage
Solution Approach 1:
The patent segments the wiring path by introducing intermediate connection points through the trench at different potentials. Instead of a single direct crossing, the wiring is divided into multiple segments connected via trench openings, with each segment handling a portion of the voltage potential difference. This segmentation reduces electric field concentration at any single point and prevents dielectric breakdown.
Solution Approach 2:
The patent introduces intermediate conductive structures within the trench that act as mediators between the high-voltage drain region and the high-potential floating region. These intermediate connections provide gradual potential transitions rather than direct high-voltage exposure, reducing electric field strength at critical interfaces and preventing breakdown of the dielectric isolation trench.
2Reliability
If wiring crosses over trench isolation region, then connection between drain and high-potential floating region is established, but isolation performance deteriorates due to electric field effects
Solution Approach 1:
The patent applies local quality by creating different wiring configurations in different regions. In the trench crossing region, specialized intermediate connection structures are used to maintain isolation, while in other regions standard wiring practices apply. This localized adaptation ensures high isolation performance at critical trench interfaces without unnecessarily complicating the overall wiring design.
3Manufacturing precision
If conventional wiring structure is used with wiring crossing trench, then manufacturing process is simpler, but breakdown voltage is reduced due to electric field localization
Solution Approach 1:
The patent implements preliminary action by pre-planning and pre-structuring the trench connection regions before final wiring assembly. The intermediate connection points and their potential distributions are designed and prepared in advance, allowing controlled electric field management from the outset. This preliminary structuring enables precise breakdown voltage control while maintaining reasonable manufacturing feasibility through standardized process steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the breakdown voltage and long-term reliability of the semiconductor apparatus by reducing electric field localization and preventing dielectric breakdown, while also minimizing the area and manufacturing costs.
Implementation Method 1
a p- diffusion layer, in contact with an n+ drain layer or with an n drift buffer layer, and a p+ diffusion layer in contact with the p- diffusion layer are formed in an n- semiconductor layer below a high-voltage wiring
Data Source
AI summary
A semiconductor apparatus includes, below a high-voltage wiring, a p− diffusion layer in contact with an n drain buffer layer and a p+ diffusion layer in contact with a p− diffusion layer for reducing the electric field strength in an insulator film, which the high-voltage wiring crosses over. Reducing electric field strength in the insulator film prevents lowering of breakdown voltage of a high-voltage NMOSFET, break down of an interlayer insulator film, and impairment of isolation breakdown voltage of a device isolation trench. The semiconductor apparatus according to the invention facilitates bridging a high-voltage wiring from a high-voltage NMOSFET and such a level-shifting device to a high-voltage floating region crossing over a device isolation trench without impairing the breakdown voltage of the high-voltage NMOSFET, without breaking down the interlayer insulator film and without impairing the isolation breakdown voltage of the device isolation trench.