Semiconductor Retainer Structure for Singulation Stress

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Solution Overview

Problem

Wafer level packaging (WLP) technology faces challenges in minimizing semiconductor device size while maintaining functionality, as singulation operations are complex and prone to damage due to the use of various materials with different properties, leading to poor bondability and potential cracking or delamination.

Innovation Solution

The implementation of a retainer structure between semiconductor bumps and the substrate periphery, along with a molding compound, to prevent the formation of a continuous matrix that could cause stress and alignment issues during singulation, allowing for easier separation and reducing the risk of substrate warping and cracking during thermal cycling.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If wafer level packaging technology is used to minimize device size, then the size of semiconductor devices is reduced, but the singulation operations become more complex and prone to damage

Engineering Contradiction:
Improvesize of semiconductor deviceVSAvoidcomplexity of singulation operations
Core Design Contradiction:
Volume of moving objectVSDevice complexity

Solution Approach 1:

The patent introduces a retainer structure that segments the continuous molding compound matrix into discrete regions around each semiconductor die. This segmentation prevents the formation of a continuous matrix that would complicate singulation, allowing individual dies to be separated more easily while maintaining the miniaturization benefits of WLP technology.

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If multiple materials with different properties are used in the semiconductor device, then the functionality and structure are enhanced, but the manufacturing complexity increases and yield loss may occur

Engineering Contradiction:
Improvefunctionality and structureVSAvoidmanufacturing complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The retainer structure acts as an intermediary element between the semiconductor die, bumps, and molding compound. It mediates the interactions between different materials with different properties, providing a unified structural framework that simplifies manufacturing processes while preserving the functional benefits of multiple materials.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Strength

If a continuous matrix of molding compound is formed around bumps, then the structural integrity is improved, but substrate warping and cracking may occur during thermal cycling

Engineering Contradiction:
Improvestructural integrityVSAvoidresistance to warping and cracking
Core Design Contradiction:
StrengthVSReliability

Solution Approach 1:

The retainer structure segments the molding compound into discrete regions, preventing the formation of a continuous matrix. This segmentation reduces the overall stress on the substrate during thermal cycling while maintaining localized structural integrity around each die, thereby preventing warping and cracking.

Inventive Principle:
Principle #1Segmentation

4Ease of operation

If singulation operations are performed on small semiconductor devices, then individual devices are obtained for assembly, but the devices are easily damaged during the process

Engineering Contradiction:
Improveindividualization for assemblyVSAvoiddamage resistance during singulation
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The retainer structure provides pre-defined separation regions that guide the singulation process. This segmentation allows individual devices to be easily obtained for assembly while protecting them from damage by providing structural support and defining clear separation paths during the cutting process.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11469200B2Semiconductor device and manufacturing method thereof
Publication Date: 2022.10.11 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11469200B2 patent drawing
  • US11469200B2 patent drawing
  • US11469200B2 patent drawing

AI summary

A semiconductor device includes a substrate includes a first layer and a second layer over the first layer, a bump disposed over the second layer, a molding disposed over the second layer and surrounding the bump, and a retainer disposed over the second layer, wherein the retainer is disposed between the molding and a periphery of the substrate. Further, a method of manufacturing a semiconductor device includes providing a substrate, disposing several bumps on the substrate, disposing a retainer on the substrate and surrounding the bumps, and disposing a molding between the bumps and the retainer.