Semiconductor Packaging Retainer Wall Filling Leakage

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Solution Overview

Problem

Semiconductor packaging devices face challenges in controlling the flow of the filling layer, leading to leakage and inadequate exposure of top surfaces of semiconductor package groups, as the filling layer can flow into spaces between packages and leak out through the edges of the base plate.

Innovation Solution

Incorporating a side retainer wall that extends upward from the base plate to surround the semiconductor package groups, which contacts the sides of the packages and confines the filling layer between them, ensuring it fills the spaces and exposes the top surfaces while preventing leakage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If the filling layer is injected through a dispenser nozzle to attach semiconductor package groups to the base plate, then the packages are securely attached, but the filling layer leaks out through edges of the base plate and flows into spaces between packages

Engineering Contradiction:
Improveattachment strengthVSAvoidfilling layer leakage
Core Design Contradiction:
StrengthVSObject-generated harmful factors

Solution Approach 1:

A retainer wall is introduced as an intermediary structure between the filling layer and the base plate edges. The retainer wall confines the filling layer within the desired area, preventing it from leaking out through the edges while still allowing the filling layer to perform its attachment function between the semiconductor package groups and the base plate.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The base plate area is segmented into different zones by the retainer wall: a confined area where the filling layer is contained and applied between package groups, and an external area where leakage is prevented. The retainer wall itself forms a boundary that divides the space to control material flow.

Inventive Principle:
Principle #1Segmentation

2Manufacturing precision

If the filling layer is applied to sufficient thickness to expose top surfaces of semiconductor packaging groups, then the top surfaces are properly exposed, but the filling layer requires sufficient time to form which reduces productivity

Engineering Contradiction:
Improveexposure precisionVSAvoidpackaging speed
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The retainer wall is constructed before the filling layer is applied. This preliminary structure prepares the confinement area in advance, guiding the filling layer into the correct position and thickness range during application, thereby reducing the time required to achieve proper exposure of top surfaces.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The retainer wall acts as a mediator that controls the distribution and thickness of the filling layer during application. By confining the filling layer within the retainer wall boundaries, the system achieves consistent thickness and proper exposure more quickly, reducing the time required compared to unconfined application methods.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Device complexity

If no retainer wall is used, then the device structure is simpler, but the filling layer cannot be physically controlled and leaks through edges

Engineering Contradiction:
Improvestructure complexityVSAvoidfilling layer control
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The retainer wall serves as a simple intermediary structure that provides physical control over the filling layer. Its design is straightforward - extending upward from the base plate to form a containment boundary - yet it effectively prevents leakage and ensures reliable filling layer application without requiring complex control systems.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS8148828B2Semiconductor packaging device
Publication Date: 2012.04.03 SAMSUNG ELECTRONICS CO LTD
  • US8148828B2 patent drawing
  • US8148828B2 patent drawing
  • US8148828B2 patent drawing

AI summary

A semiconductor packaging device is provided. Semiconductor package groups, a side retainer wall, and a filling layer may be located on a base plate. The side retainer wall may be located around the semiconductor package groups. The filling layer may be located between the side retainer wall and the semiconductor package groups.