Semiconductor Structure Retrograde Doping for High Frequency
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Solution Overview
Problem
Conventional Schottky barrier diodes in silicon CMOS technology face a tradeoff between reducing series resistance and junction capacitance, which is essential for achieving high cutoff frequencies beyond 300 GHz, as increasing carrier concentration decreases series resistance but increases junction capacitance.
Innovation Solution
A semiconductor structure with a retrograde implantation profile is implemented, featuring a non-uniform dopant distribution with a lighter doped region near the surface and a heavier doped region beneath it, reducing both series resistance and junction capacitance simultaneously.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional uniform doping is used, then manufacturing is simple, but both series resistance and junction capacitance cannot be optimized simultaneously
Solution Approach 1:
The patent changes the doping parameter from a uniform concentration to a depth-dependent concentration profile. The retrograde implantation process modifies the vertical distribution of dopants, creating a specific concentration gradient that optimizes electrical performance while remaining compatible with existing CMOS manufacturing processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively decreases series resistance and junction capacitance, enabling the development of high cutoff frequency devices suitable for millimeter wave applications without deteriorating performance.
Implementation Method 1
A method for forming a semiconductor structure is disclosed. A retrograde implantation profile is formed in a first well region of a first conductivity type in a semiconductor substrate
Data Source
AI summary
Present disclosure provides a semiconductor structure, including a semiconductor substrate having a top surface, a first well region of a first conductivity type in the semiconductor substrate, a second well region of a second conductivity type in the semiconductor substrate, laterally surrounding the first well region, and an isolation region in the first well region and the second well region in proximity to the top surface. The first well region includes a first lighter doped region in proximity to the top surface, and a heavier doped region under the first lighter doped region. Present disclosure also provides a method for manufacturing the semiconductor structure described herein.


