Semiconductor Backside Power Structure With Reverse-Biased Junction Isolation

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The increasing demand for high-performance, high-speed, and multifunctional semiconductor devices has led to challenges in improving the reliability of semiconductor devices with back side power delivery networks (BSPDN) due to limitations in power transmission and integration.

Innovation Solution

The semiconductor device design includes an active region with ion-doped regions, a gate structure, source/drain regions, a device isolation layer, an interlayer insulating layer, and a vertical power structure, along with a lower wiring system that forms a back side power delivery network, enhancing power transmission and reliability by forming a P-N-P or N-P-N junction for reverse bias operation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If a back side power delivery network (BSPDN) structure is adopted to transmit power from the rear side, then power transmission efficiency is improved, but reliability deteriorates due to limitations in power transmission and integration

Engineering Contradiction:
Improvepower transmission efficiencyVSAvoiddevice reliability
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The patent transitions from planar power delivery to vertical 3D power delivery by introducing a vertical power structure that extends through multiple layers (device isolation layer, interlayer insulating layer) to contact the lower surface of the active region. This dimensional change enables efficient power transmission from the back side while maintaining reliability through proper vertical integration.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent introduces an ion doped region with opposite conductivity type within the active region to form a P-N-P or N-P-N junction. This local modification creates reverse bias operation that prevents harmful interactions between the lower wiring and active region, thereby improving reliability while maintaining power transmission efficiency.

Inventive Principle:
Principle #3Local quality

2Adaptability or versatility

If degree of integration is increased to meet high performance demands, then device functionality is improved, but reliability deteriorates due to integration limitations

Engineering Contradiction:
Improvedevice functionalityVSAvoidintegration reliability
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent segments the power delivery function from the signal processing function by introducing a dedicated vertical power structure separate from the active device regions. This segmentation allows high integration of multiple functions while maintaining reliability through functional isolation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an ion doped region as an intermediary element that forms a reverse bias junction between the lower wiring and the active region. This intermediary structure enables high integration by allowing close proximity of power and signal elements while preventing harmful interactions through reverse bias operation.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Use of energy by moving object

If vertical power structure is introduced to improve power delivery, then power transmission is improved, but device complexity increases

Engineering Contradiction:
Improvepower delivery efficiencyVSAvoidstructure complexity
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The vertical power structure serves multiple functions: it delivers power from the back side, provides electrical connection through the device isolation layer and interlayer insulating layer, and works in conjunction with the ion doped region to enable reverse bias operation. This multi-functionality reduces the need for separate structures, thereby limiting the increase in device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

4Reliability

If ion doped region is added to form P-N-P or N-P-N junction, then reliability is improved through reverse bias operation, but device complexity increases

Engineering Contradiction:
Improvepower transmission reliabilityVSAvoiddoping structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the ion doped region formation with the existing active region fabrication process. The ion doped region is introduced within the active region during the same manufacturing sequence, combining multiple functions (power delivery, reverse bias protection) into a single integrated structure rather than adding separate components.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design improves the reliability and integration of semiconductor devices by enabling efficient power delivery and insulation, addressing the challenges of power transmission and substrate thickness control, while maintaining device performance.

Implementation Method 1

forming a P-N-P or N-P-N junction for reverse bias operation

Methodology Applied
Scientific EffectReverse bias operation: Diode

Data Source

PatentUS20240371762A1Semiconductor device
Publication Date: 2024.11.07 SAMSUNG ELECTRONICS CO LTD
  • US20240371762A1 patent drawing
  • US20240371762A1 patent drawing
  • US20240371762A1 patent drawing

AI summary

An example semiconductor device includes an active region extending in a first direction and including first conductivity-type impurities, an ion doped region extending in the first direction in the active region and including second conductivity-type impurities, a gate structure extending in a second direction, intersecting the first direction, disposed on the active region and traversing the active region, a source/drain region on the active region on at least one side of the gate structure, a device isolation layer surrounding the active region, an interlayer insulating layer on the device isolation layer and covering the gate structure and the source/drain region, a vertical power structure extending in a third direction, perpendicular to the first and second directions, and passing through the device isolation layer and the interlayer insulating layer, and a bottom wiring connected to the vertical power structure and contacting a bottom surface of the active region.