Semiconductor Layout for Lower Reverse Recovery Current

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Solution Overview

Problem

Existing semiconductor devices with integrated transistor and diode portions on the same substrate face challenges in efficiently managing carrier lifetime and reducing reverse recovery current, which affects the device's performance and reliability.

Innovation Solution

The semiconductor device incorporates a front surface side lifetime reduction region, specifically formed by introducing a lifetime killer such as helium ions in the diode and boundary portions, to control carrier lifetime and reduce reverse recovery current without affecting the transistor portion.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-generated harmful factors

If a lifetime reduction region is formed in the entire substrate including transistor portion, then reverse recovery current is reduced, but transistor performance deteriorates

Engineering Contradiction:
Improvereverse recovery currentVSAvoidtransistor performance
Core Design Contradiction:
Object-generated harmful factorsVSReliability

Solution Approach 1:

The patent applies local quality by forming the lifetime reduction region selectively only in the diode portion and boundary portion of the semiconductor substrate, while excluding the transistor portion. This is achieved through selective ion implantation or diffusion processes that introduce recombination centers (such as gold, platinum, or oxygen) into specific regions. The selective formation allows the diode to have reduced carrier lifetime (lowering reverse recovery current) while the transistor maintains its original carrier lifetime and performance characteristics.

Inventive Principle:
Principle #3Local quality

2Object-generated harmful factors

If carrier lifetime is reduced to lower reverse recovery current, then diode performance improves, but overall device complexity increases

Engineering Contradiction:
Improvereverse recovery currentVSAvoiddevice structure
Core Design Contradiction:
Object-generated harmful factorsVSDevice complexity

Solution Approach 1:

The patent segments the semiconductor substrate into distinct functional regions: transistor portion, diode portion, and boundary portion. The lifetime reduction region is formed selectively in the diode portion and boundary portion, but not in the transistor portion. This segmentation allows independent optimization of each region's characteristics - the diode benefits from reduced carrier lifetime while the transistor maintains its performance, avoiding the need for separate devices or complex additional structures.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively adjusts carrier lifetime in the diode portion, reduces reverse recovery current, and enhances the semiconductor device's performance and reliability by minimizing the impact on the transistor portion.

Implementation Method 1

specifically formed by introducing a lifetime killer such as helium ions in the diode and boundary portions

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Data Source

PatentUS12205948B2Semiconductor device
Publication Date: 2025.01.21 FUJI ELECTRIC CO LTD
  • US12205948B2 patent drawing
  • US12205948B2 patent drawing
  • US12205948B2 patent drawing

AI summary

Provided is a semiconductor device, wherein a straight line extending from an end portion E1 in the extending direction of a contact hole for electrically connecting an emitter electrode and a front surface of a semiconductor substrate toward a back surface of the semiconductor substrate is defined as a first perpendicular line, a straight line forming a predetermined angle θ1 with respect to the first perpendicular line and passing through the end portion E1 in the extending direction of the contact hole is defined as a first straight line, a position where the first straight line intersects a back surface of the semiconductor substrate is defined as a position M1, and the position M1 is located on an outer side of a cathode region in the extending direction.