Semiconductor Rewiring via Mask-Free and Mask-Based Photolithography
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Solution Overview
Problem
The existing rewiring processes in fan-out wafer-level packaging (FOWLP) face challenges in achieving high yield and throughput due to the limitations of photolithography techniques, with mask-based methods being inaccurate and mask-free methods being time-consuming, making them unsuitable for mass production.
Innovation Solution
A method combining mask-free and mask-based photolithography to accurately correct deviations in semiconductor device terminals, using mask-free photolithography for initial alignment and mask-based photolithography for forming wiring layers and solder balls, allowing for efficient and accurate rewiring.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If mask-based photolithography is used to define shapes and positions, then positioning accuracy is improved, but manufacturing yield deteriorates due to inability to accommodate die rearrangement inaccuracies
Solution Approach 1:
The patent applies preliminary action by measuring the actual positions of electrical connection terminals before the photolithography process and calculating deviation data in advance. This allows the system to pre-compensate for die rearrangement inaccuracies by adjusting photolithography parameters based on measured terminal positions, ensuring both high positioning accuracy and manufacturing yield.
2Adaptability or versatility
If mask-free photolithography is used to process all areas, then adaptability to die rearrangement is improved, but productivity deteriorates due to extremely low throughput
Solution Approach 1:
The patent applies local quality by differentiating the photolithography approach based on local deviation characteristics. Areas with large deviations from standard positions are processed using mask-free photolithography for adaptability, while areas with small deviations are processed using mask-based photolithography for high throughput. This localized differentiation optimizes both adaptability and productivity.
3Manufacturing precision
If mask-free photolithography is used for individual fitting calculations, then positioning accuracy is improved, but loss of time increases due to extended process cycles
Solution Approach 1:
The patent applies partial action by performing individual fitting calculations only for specific areas where deviation exceeds a predetermined threshold, rather than processing the entire carrier with mask-free photolithography. This selective approach maintains positioning accuracy where needed while minimizing the time loss associated with computationally intensive processing.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This combined approach enhances efficiency and reduces process cycles, achieving higher accuracy and throughput compared to using either method alone, making it suitable for mass production.
Implementation Method 1
shining light through a proportionally-scaled pattern in a pre-fabricated mask onto photoresist coated on the die to cause a photoreaction therein
Data Source
AI summary
A method for rewiring of semiconductor devices is provided, in which deviations of electrical connection terminals (211, 212, 221, 222, 231, 232) on a carrier (100) are calculated and corrected by forming rewiring structures on the electrical connection terminals by mask-free photolithography. A wiring layer and/or solder balls (700) is/are then formed on the rewiring structures by processing the carrier (100) in a monolithic manner using mask-based photolithography. In this way, the combined use of mask-free photolithography and mask-based photolithography allows for higher efficiency and a shorter process cycle, compared to only using mask-free photolithography.